A.E.A. Almaini

Bio: A.E.A. Almaini is an academic researcher from Edinburgh Napier University. The author has contributed to research in topics: Adder & Low-power electronics. The author has an hindex of 8, co-authored 14 publications receiving 299 citations. Previous affiliations of A.E.A. Almaini include University of Edinburgh.

State assignment of finite state machines using a genetic algorithm

Abstract: The use of genetic algorithms for the generation of optimal state assignments for synchronous finite state machines (FSM) is proposed. Results are presented to show that, in all examples attempted, the resulting state assignments are better than or at least as good as those produced by SPECTRAL, NOVA and MUSTANG and also closed partition assignments. On average, the genetic algorithm produced assignments with 33% less logic than the best produced by other algorithms.

Electronic Logic Systems

Abstract: Part 1 Principles of logic systems: combinational logic logic and memory devices combinational logic at different levels of integration synchronous sequential circuits asynchronous sequential circuits arithmetic logic circuits. Part 2 Advanced logic systems: combinational logic techniques partitioning of sequential circuits partition-based design for synchronous sequential circuits partition-based design for asynchronous sequential circuits hybrid design techniques for sequential circuits CAD of logic circuits.

Tabular techniques for Reed—Muller logic

Abstract: Tabular techniques are described for the conversion between boolean expressions and Reed-Muller polynomials, and for the derivation of fixed polarities. The techniques are simple, systematic, and can be used manually or programmed on a computer. Further, they can be used for any number of variables and hence overcome map limitations. Computer programs have been developed to implement the algorithms.

Optimization of Reed-Muller logic functions

Abstract: Two algorithms are presented, the first is a technique to determine good, though not necessarily optimum, fixed polarity Reed-Muller expansions of completely specified boolean functions. The second algorithm determines the allocations of the ‘don't care’ terms of incompletely specified boolean functions resulting in optimum positive polarity Reed-Muller expansions. Additionally, investigations are made into combining these two techniques to determine fixed polarity Reed-Muller expansions of incompletely specified boolean functions. Results are presented which show the effectiveness of the techniques and comparisons are made with existing methods.

Differential CMOS edge-triggered flip-flop with clock-gating

Abstract: A non-redundant transition clock chain is proposed and applied to differential edge-triggered flip-flops. PSPICE simulation shows that compared to a recently published design the proposed circuit can save power when the switching activity of the input signal is <0.65. Power reduction can be as high as 86% when the input is idle.

Metaheuristics: A bibliography

Abstract: Metaheuristics are the most exciting development in approximate optimization techniques of the last two decades. They have had widespread successes in attacking a variety of difficult combinatorial optimization problems that arise in many practical areas. This bibliography provides a classification of a comprehensive list of 1380 references on the theory and application of metaheuristics. Metaheuristics include but are not limited to constraint logic programming; greedy random adaptive search procedures; natural evolutionary computation; neural networks; non-monotonic search strategies; space-search methods; simulated annealing; tabu search; threshold algorithms and their hybrids. References are presented in alphabetical order under a number of subheadings.

Architectures for molecular electronic computers. I. Logic structures and an adder designed from molecular electronic diodes

Abstract: Recently, there have been significant advances in the fabrication and demonstration of individual molecular electronic wires and diode switches. This paper reviews those developments and shows how demonstrated molecular devices might be combined to design molecular-scale electronic digital computer logic. The design for the demonstrated rectifying molecular diode switches is refined and made more compatible with the demonstrated wires through the introduction of intramolecular dopant groups chemically bonded to modified molecular wires. Quantum mechanical calculations are performed to characterize some of the electrical properties of the proposed molecular diode switches. Explicit structural designs are displayed for AND, OR, and XOR gates that are built from molecular wires and molecular diode switches. The diode-based molecular electronic logic gates are combined to produce a design for a molecular-scale electronic half adder and a molecular-scale electronic full adder. These designs correspond to conductive monomolecular circuit structures that would be one million times smaller in area than the corresponding micron-scale digital logic circuits fabricated on conventional solid-state semiconductor computer chips. It appears likely that these nanometer-scale molecular electronic logic circuits could be fabricated and tested in the foreseeable future. At the very least, such molecular circuit designs constitute an exploration of the ultimate limits of electronic computer circuit miniaturization.

High-performance and low-power conditional discharge flip-flop

Abstract: In this paper, high-performance flip-flops are analyzed and classified into two categories: the conditional precharge and the conditional capture technologies. This classification is based on how to prevent or reduce the redundant internal switching activities. A new flip-flop is introduced: the conditional discharge flip-flop (CDFF). It is based on a new technology, known as the conditional discharge technology. This CDFF not only reduces the internal switching activities, but also generates less glitches at the output, while maintaining the negative setup time and small D-to-Q delay characteristics. With a data-switching activity of 37.5%, the proposed flip-flop can save up to 39% of the energy with the same speed as that for the fastest pulsed flip-flops.

Designing Electronic Circuits Using Evolutionary Algorithms. Arithmetic Circuits: A Case Study

Abstract: A Genetic Algorithm is presented which is capable of evolving 100% functional arithmetic circuits. Evolved designs are presented for one-bit, two-bit adders with carry, and two and three-bit multipliers and details of the 100% correct evolution of three and four-bit adders. The largest of these circuits are the most complex digital circuits to have been designed by purely evolutionary means. The algorithm is able to re-discover conventionally optimum designs for the one-bit and two-bit adders, but more significantly is able to improve on the conventional designs for the two-bit multiplier. By analysing the history of an evolving design up to complete functionality it is possible to gain insight into evolutionary process. The technique is based on evolving the functionality and connectivity of a rectangular array of logic cells and is modelled on the resources available on the Xilinx 6216 FPGA device. Further work is described about plans to evolve the designs directly onto this device.

State assignment of finite state machines using a genetic algorithm

Abstract: The use of genetic algorithms for the generation of optimal state assignments for synchronous finite state machines (FSM) is proposed. Results are presented to show that, in all examples attempted, the resulting state assignments are better than or at least as good as those produced by SPECTRAL, NOVA and MUSTANG and also closed partition assignments. On average, the genetic algorithm produced assignments with 33% less logic than the best produced by other algorithms.