Author
A. Jhunjhunwala
Bio: A. Jhunjhunwala is an academic researcher from Indian Institute of Technology Madras. The author has contributed to research in topics: Signal processing & Digital image processing. The author has an hindex of 1, co-authored 1 publications receiving 3 citations.
Papers
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TL;DR: An implementation of a dual-bank data memory to enable parallel operations of a TMS32010 DSP chip and a 68000 host processor and the results presented show an enhancement in processing speed.
3 citations
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TL;DR: An alternative DMA-based scheme is presented for efficient transfer of data between processors for demanding applications where real-time performance and maximum system bandwidth are essential.
3 citations
TL;DR: A signal processing workstation has been designed to get optimum performance from the TMS32010 signal processor and shares those tasks of the signal processing algorithms that it can do better than the T MS32010.
Abstract: In recent years many fast Digital Signal Processing chips have appeared in the market. A signal processing workstation has been designed to get optimum performance from the TMS32010 signal processor. The host system is built around MC68000 which handles the system control functions. It also shares those tasks of the signal processing algorithms that it can do better than the TMS32010. A dual bank data memory is provided on the DSP card to allow this sharing of tasks in an efficient way and to enable the parallel operation of the two processors. The resulting throughput is significantly higher than that in a conventional approach.
16 Jun 1991
TL;DR: The authors discuss a dual- bank controller with GAL chips, present a TMS320C25 module with the dual-bank data memory under PC-bus, and describe the module's features.
Abstract: With the shortage of facilities for general control, TMS320C25 is often used as the slave processor in a master-slave system. The authors introduce the concepts and relationships of various common memories (like dual-access, dual-port and dual-bank memory), through which communication between any two processors can take place. Accordingly, the authors discuss a dual-bank controller with GAL chips, present a TMS320C25 module with the dual-bank data memory under PC-bus, and describe the module's features. >