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Author

Abhijit Dana

University of Calcutta
Bio: Abhijit Dana is an academic researcher from University of Calcutta. The author has contributed to research in topics: CMOS & Transistor. The author has co-authored 2 publications.
Topics: CMOS, Transistor, Operational transconductance amplifier
Papers
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Book Chapter•DOI•
An Improved gm/ID Methodology for Ultra-Low-Power Nano-Scale CMOS OTA Design

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Somnath Paul1, Abhijit Dana1, Soumya Pandit1•
University of Calcutta1
01 Jan 2013-Communications in computer and information science
TL;DR: An improved g m /I D methodology for the design of low-power CMOS operational transconductance amplifier (OTA) circuit using nano-scale CMOS technology and the advantage of the improved methodology over the traditional methodology has been discussed and illustrated with simulation results.
Abstract: This paper presents an improved g m /I D methodology for the design of low-power CMOS operational transconductance amplifier (OTA) circuit using nano-scale CMOS technology. This methodology takes into considerations the dependence of the Early voltage parameter with the bias points of a nano-scale MOS transistor. With such considerations, the DC voltage gain of the circuit can be controlled by adjusting the bias points of the transistors and keeping the channel length constant. The advantage of the improved methodology over the traditional methodology has been discussed and illustrated with simulation results.
An Improved g m / I D Methodology for Ultra-Low-Power Nano-Scale CMOS OTA Design.

[...]

Somnath Paul, Abhijit Dana, Soumya Pandit
01 Jan 2013
TL;DR: An improved g m /I D methodology for the design of low power CMOS operational transconductance amplifier (OTA) circuit using nano-scale CMOS technology is presented in this paper.
Abstract: This paper presents an improved g m /I D methodology for the design of low-power CMOS operational transconductance amplifier (OTA) circuit using nano-scale CMOS technology. This methodology takes into considerations the dependence of the Early voltage parameter with the bias points of a nano-scale MOS transistor. With such considerations, the DC voltage gain of the circuit can be controlled by adjusting the bias points of the transistors and keeping the channel length constant. The advantage of the improved methodology over the traditional methodology has been discussed and illustrated with simulation results.