This article proposes the implementation and design of a first-order CMOS Bandgap reference using an operational amplifier with negative feedback to improve the power supply rejection ratio (PSRR) and reduce the temperature coefficient (TC). The circuit is designed in 180 nm CMOS process technology and provides a reference output voltage of 1.2 V over an extended temperature range from −40 °C to 120 °C with a measured temperature coefficient of 54 ppm/°C. The BGR chip uses a 1.8 V supply.

Design of a CMOS Bandgap Reference Voltage Using the OP AMP in 180 nm Process

A regeneration based BGR circuit is proposed in this paper. The regeneration using positive feedback results in the positive temperature coeffecient of 2.34 mV/° C from the single stage at room temperature. This results in 60 % saving in power and over 80 % saving in area, when compared with the state-of-the-art trimming less BGR circuits. The obtained temperature coefficient is 33 ppm/° C for the temperature range 0° C–90° C. The circuit is designed and simulated in UMC 180nm CMOS process. The circuit consumes power of 40 nW and occupies an area of 0.003 mm2. The reference voltage of 819 mV is achieved at 1.2 V power supply. The power supply rejection ratio at 40 kHz is −47 dB.

Abhishek Shrivastava

Papers

A 1.2 V, 33 ppm/°C, 40 nW, regeneration based BGR circuit for nanowatt CMOS LSIs