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Abinash Tripathy

Bio: Abinash Tripathy is an academic researcher from Indian Institutes of Information Technology. The author has contributed to research in topics: Inverter & Total harmonic distortion. The author has an hindex of 1, co-authored 1 publications receiving 1 citations.

Papers
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Proceedings ArticleDOI
01 Jul 2018
TL;DR: This paper presents a comparative analysis of four different topologies of an eleven level ELI based on criterion like total harmonic distortion (THD), complexity of the circuit and numbers of switching devices and components considering solar photo voltaic cells via boosters as input sources.
Abstract: This paper presents a comparative analysis of four different topologies of an eleven level inverter (ELI) based on criterion like total harmonic distortion (THD), complexity of the circuit and numbers of switching devices and components considering solar photo voltaic cells via boosters as input sources. The topologies considered are neutral point clamped or diode clamped type, flying capacitor type, cascaded H-bridge type and the reduced switch version of the cascaded H-bridge type. These configurations are modeled in MATLAB/simulink software environment for an eleven level inverter. Each switch of the single phase ELI is controlled by giving pulse with the help of PWM generator. The comparison results are presented and discussed.

1 citations


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Journal ArticleDOI
31 May 2021
TL;DR: This paper describes a 7-Level Cascaded H-Bridge Multilevel Inverter (CHB-MLI) architecture with fewer switches and lower harmonics, ideally suited for medium voltage and high-power applications since it synthesizes numerous Direct Current (DC) sources.
Abstract: In the current context, Medium Voltage High Power (MVHP) applications are developing industrial technologies. The direct connection of a Photovoltaic (PV) system to an MVHP system may cause various connectivity challenges. To address the interconnection difficulties, this paper describes a 7-Level Cascaded H-Bridge Multilevel Inverter (CHB-MLI) architecture with fewer switches and lower harmonics. This article proposes the Reduced Switch Multilevel Inverter (RSMLI). This design is less expensive than traditional Multilevel Inverter (MLI) topologies, and it is ideally suited for medium voltage and high-power applications since it synthesizes numerous Direct Current (DC) sources. The innovative 7-Level inverter is represented with a decreased number of switches using the Phase Opposition Disposition (POD) methodology. The lower switch count helps the construction of simple converter structures. To boost performance, the MATLAB/Simulink results are evaluated.

2 citations