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Adam William Saxler

Other affiliations: Northwestern University, Micron Technology, Durham University  ...read more
Bio: Adam William Saxler is an academic researcher from Cree Inc.. The author has contributed to research in topics: Layer (electronics) & Nitride. The author has an hindex of 44, co-authored 170 publications receiving 6634 citations. Previous affiliations of Adam William Saxler include Northwestern University & Micron Technology.


Papers
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Journal ArticleDOI
TL;DR: In this article, a GaN high-electron-mobility-transistors (HEMTs) on SiC were fabricated with field plates of various dimensions for optimum performance, and an enhancement in radio frequency (RF) current-voltage swings was achieved with acceptable compromise in gain, through both reduction in the trapping effect and increase in breakdown voltages.
Abstract: GaN high-electron-mobility-transistors (HEMTs) on SiC were fabricated with field plates of various dimensions for optimum performance Great enhancement in radio frequency (RF) current-voltage swings was achieved with acceptable compromise in gain, through both reduction in the trapping effect and increase in breakdown voltages When biased at 120 V, a continuous wave output power density of 322 W/mm and power-added efficiency (PAE) of 548% at 4 GHz were obtained using devices with dimensions of 055/spl times/246 /spl mu/m/sup 2/ and a field-plate length of 11 /spl mu/m Devices with a shorter field plate of 09 /spl mu/m also generated 306 W/mm with 496% PAE at 8 GHz Such ultrahigh power densities are a dramatic improvement over the 10-12 W/mm values attained by conventional gate GaN-based HEMTs

1,077 citations

Journal ArticleDOI
TL;DR: In this paper, the electrical properties of p-type Mg-doped GaN were investigated through variable-temperature Hall effect measurements, and the measured doping efficiency drops in samples with Mg concentration above 2×1020 cm−3.
Abstract: The electrical properties of p-type Mg-doped GaN are investigated through variable-temperature Hall effect measurements. Samples with a range of Mg-doping concentrations were prepared by metalorganic chemical vapor phase deposition. A number of phenomena are observed as the dopant density is increased to the high values typically used in device applications: the effective acceptor energy depth decreases from 190 to 112 meV, impurity conduction at low temperature becomes more prominent, the compensation ratio increases, and the valence band mobility drops sharply. The measured doping efficiency drops in samples with Mg concentration above 2×1020 cm−3.

343 citations

Proceedings ArticleDOI
Yifeng Wu, Marcia Moore, Adam William Saxler1, T. Wisleder, P. Parikh 
26 Jun 2006
TL;DR: In this paper, a double field-plated GaN HEMT with increased power density and robustness was presented, where a first field plate (FP1) was integrated with the gate for both reduced gate resistance and elimination of electron trapping.
Abstract: Field plate technologies have dramatically raised the benchmarks of GaN-based high-electron-mobility transistors (HEMTs). Greater than 30 W/mm power density was demonstrated with gate-connected field plates'. The drawback of additional feedback capacitances added by the field plates was then addressed using source-termination, achieving 21dB large-signal gain and 20-W/mm power density at 4 GHz"l. Recently, multiple field plates were pursued for further improvements""v I. Here we present double field-plated GaN HEMTs with increased power density and robustness. The devices in this study consisted of a Cree HPSI SiC substrate, a 2-4 ptm thick insulating GaN buffer, a thin AlN interlayer and an Al0.26Gao.74N barrier layer. The GaN buffer was doped with Fe for enhanced resistivity and the AlN interlay was included to achieve a high charge-mobility product without the complication of increasing the Al mole fraction of the top AlGaN layer. The device has a first field plate (FP1) integrated with the gate for both reduced gate resistance and elimination of electron trapping. The task of further tailoring the electric field and attaining a higher breakdown voltage is accomplished by a second field plate (FP2), placed on the drain side of the first field plate. FP2 is electrically connected to the source of the HEMT to minimize feedback capacitance. When designed properly, the double field-plated devices can offer a more optimal electric field distribution, improving performance and robustness. Targeting high-power operation at C band, the length of FP1 was set at LF1=0.3-0.5 ptm and FP2 at LF2=0.9-1.2 ptm. The SiN dielectric thickness under FP1 and FP2 was 100 nm and 200 nm, respectively. The device fabrication steps were similar to previous reports,"" except for the gate formation, where the integrated gate and FP1 were deposited on the SiN layer with a previously etched gate opening. Devices of four configurations were fabricated for a direct comparison. Device A had no field plate. Device B had double field plates, both connected to the gate. Device C had double field plates, FP, connected to the gate and FP2 connected to the source. Device D had a single field plate connected to the source. The gate length was about 0.55 ptm and gate-drain separation was 3.5 ptm. Typical devices showed -4 V pinch-off voltage and >1.2 A/mm full channel current. While circuit element extraction from S-parameters revealed practically the same current gain cut-off frequency of 30-35 GHz for the intrinsic devices, the maximum stable gains (MSG) varied based on the extrinsic parasitics. In particular, with LF1=0.3 pim and LF2=0.9 pim, MSG values at 10-GHz and 41 V for devices A, B, C and D were 15.6 dB, 11.2 dB, 16.7 dB and 17.1dB, respectively. It is expected that device B with both field plates connected to the gate has a high feedback capacitance, hence a much lower MSG than the non-field-pate device A. With FP2 connected to the source, however, device C actually exhibited higher MSG than the non-field-pate device. This is attributed to the Faraday shielding effect by the source field plate, which reduces the feedback capacitance. Although device D, with a single field plate connected to the source, showed 0.4-dB higher gain than device C, the less-optimum electric field distribution made it less robust and more prone to degradation at high operation voltages. Power measurements were performed with a load-pull system at 4 GHz. As intended, device C showed the best combination of output power, gain, power-added efficiency and robustness. A 246-pim-wide device with LF1=0.5 pim and LF2=1 .2 pim was able to be biased at 135 V and achieved a continuous-wave (CW) power density of 41.4 W/mm, along with 16-dB associated gain and 60% PAE. This is a significant improvement over previous result of 32.2 W/mm, 14 dB associated gain and 54.8% PAE by single-field-plated GaN HEMTs. Initial reliability tests showed that the double-fieldplated device had no degradation after 100-hour RF operation at 80 V while generating CW output power of 25 W/mm. In summary, a double-field-plate structure has been developed to extend the performance limit of microwave GaN HEMTs. The first field plate offers a high gate conductance and prevents the onset of trapping; while the 2nd field plate maximizes operation voltage without additional feedback capacitances. 41.4 W/mm CW power density was obtained, establishing a new state-of-the-art for microwave devices.

328 citations

Patent
15 Jul 2003
TL;DR: In this paper, a mask is fabricated and patterned on the first cap layer, and a second cap layer comprising a Group III-nitride semiconductor material is selectively fabricated using the patterned mask.
Abstract: Contacts for a nitride based transistor and methods of fabricating such contacts provide a recess through a regrowth process. The contacts are formed in the recess. The regrowth process includes fabricating a first cap layer comprising a Group III-nitride semiconductor material. A mask is fabricated and patterned on the first cap layer. The pattern of the mask corresponds to the pattern of the recesses for the contacts. A second cap layer comprising a Group III-nitride semiconductor material is selectively fabricated (e.g. grown) on the first cap layer utilizing the patterned mask. Additional layers may also be formed on the second cap layer. The mask may be removed to provide recess(es) to the first cap layer, and contact(s) may be formed in the recess(es). Alternatively, the mask may comprise a conductive material upon which a contact may be formed, and may not require removal.

188 citations

Patent
20 Nov 2002
TL;DR: In this paper, the authors proposed a method of fabricating a Group III-nitride-based heterojunction transistor, which includes a substrate and a first Group III nitride layer, such as an AlGaN-based layer, on the substrate.
Abstract: A nitride based heterojunction transistor includes a substrate and a first Group III nitride layer, such as an AlGaN based layer, on the substrate. The first Group III-nitride based layer has an associated first strain. A second Group III-nitride based layer, such as a GaN based layer, is on the first Group III-nitride based layer. The second Group III-nitride based layer has a bandgap that is less than a bandgap of the first Group III-nitride based layer and has an associated second strain. The second strain has a magnitude that is greater than a magnitude of the first strain. A third Group III-nitride based layer, such as an AlGaN or AlN layer, is on the GaN layer. The third Group III-nitride based layer has a bandgap that is greater than the bandgap of the second Group III-nitride based layer and has an associated third strain. The third strain is of opposite strain type to the second strain. A source contact, a drain contact and a gate contact may be provided on the third Group III-nitride based layer. Nitride based heterojunction transistors having an AlGaN based bottom confinement layer, a GaN based channel layer on the bottom confinement layer and an AlGaN based barrier layer on the channel layer, the barrier layer having a higher concentration of aluminum than the bottom confinement layer, are also provided. Methods of fabricating such transistor are also provided.

187 citations


Cited by
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Journal ArticleDOI
TL;DR: In this article, the authors present a comprehensive, up-to-date compilation of band parameters for the technologically important III-V zinc blende and wurtzite compound semiconductors.
Abstract: We present a comprehensive, up-to-date compilation of band parameters for the technologically important III–V zinc blende and wurtzite compound semiconductors: GaAs, GaSb, GaP, GaN, AlAs, AlSb, AlP, AlN, InAs, InSb, InP, and InN, along with their ternary and quaternary alloys. Based on a review of the existing literature, complete and consistent parameter sets are given for all materials. Emphasizing the quantities required for band structure calculations, we tabulate the direct and indirect energy gaps, spin-orbit, and crystal-field splittings, alloy bowing parameters, effective masses for electrons, heavy, light, and split-off holes, Luttinger parameters, interband momentum matrix elements, and deformation potentials, including temperature and alloy-composition dependences where available. Heterostructure band offsets are also given, on an absolute scale that allows any material to be aligned relative to any other.

6,349 citations

Journal ArticleDOI
TL;DR: In this paper, the authors describe the state-of-the-art computational methodology for calculating the structure and energetics of point defects and impurities in semiconductors and pay particular attention to computational aspects which are unique to defects or impurities, such as how to deal with charge states and how to describe and interpret transition levels.
Abstract: First-principles calculations have evolved from mere aids in explaining and supporting experiments to powerful tools for predicting new materials and their properties. In the first part of this review we describe the state-of-the-art computational methodology for calculating the structure and energetics of point defects and impurities in semiconductors. We will pay particular attention to computational aspects which are unique to defects or impurities, such as how to deal with charge states and how to describe and interpret transition levels. In the second part of the review we will illustrate these capabilities with examples for defects and impurities in nitride semiconductors. Point defects have traditionally been considered to play a major role in wide-band-gap semiconductors, and first-principles calculations have been particularly helpful in elucidating the issues. Specifically, calculations have shown that the unintentional n-type conductivity that has often been observed in as-grown GaN cannot be a...

2,557 citations

Journal ArticleDOI
TL;DR: In this paper, a comprehensive and up-to-date compilation of band parameters for all of the nitrogen-containing III-V semiconductors that have been investigated to date is presented.
Abstract: We present a comprehensive and up-to-date compilation of band parameters for all of the nitrogen-containing III–V semiconductors that have been investigated to date. The two main classes are: (1) “conventional” nitrides (wurtzite and zinc-blende GaN, InN, and AlN, along with their alloys) and (2) “dilute” nitrides (zinc-blende ternaries and quaternaries in which a relatively small fraction of N is added to a host III–V material, e.g., GaAsN and GaInAsN). As in our more general review of III–V semiconductor band parameters [I. Vurgaftman et al., J. Appl. Phys. 89, 5815 (2001)], complete and consistent parameter sets are recommended on the basis of a thorough and critical review of the existing literature. We tabulate the direct and indirect energy gaps, spin-orbit and crystal-field splittings, alloy bowing parameters, electron and hole effective masses, deformation potentials, elastic constants, piezoelectric and spontaneous polarization coefficients, as well as heterostructure band offsets. Temperature an...

2,525 citations

Journal ArticleDOI
TL;DR: In this paper, the structural and point defects caused by lattice and stacking mismatch with substrates are discussed. But even the best of the three binaries, InN, AIN and AIN as well as their ternary compounds, contain many structural defects, and these defects notably affect the electrical and optical properties of the host material.
Abstract: Gallium nitride (GaN) and its allied binaries InN and AIN as well as their ternary compounds have gained an unprecedented attention due to their wide-ranging applications encompassing green, blue, violet, and ultraviolet (UV) emitters and detectors (in photon ranges inaccessible by other semiconductors) and high-power amplifiers. However, even the best of the three binaries, GaN, contains many structural and point defects caused to a large extent by lattice and stacking mismatch with substrates. These defects notably affect the electrical and optical properties of the host material and can seriously degrade the performance and reliability of devices made based on these nitride semiconductors. Even though GaN broke the long-standing paradigm that high density of dislocations precludes acceptable device performance, point defects have taken the center stage as they exacerbate efforts to increase the efficiency of emitters, increase laser operation lifetime, and lead to anomalies in electronic devices. The p...

1,724 citations

Journal ArticleDOI
TL;DR: The role of extended and point defects, and key impurities such as C, O, and H, on the electrical and optical properties of GaN is reviewed in this article, along with the influence of process-induced or grown-in defects and impurities on the device physics.
Abstract: The role of extended and point defects, and key impurities such as C, O, and H, on the electrical and optical properties of GaN is reviewed. Recent progress in the development of high reliability contacts, thermal processing, dry and wet etching techniques, implantation doping and isolation, and gate insulator technology is detailed. Finally, the performance of GaN-based electronic and photonic devices such as field effect transistors, UV detectors, laser diodes, and light-emitting diodes is covered, along with the influence of process-induced or grown-in defects and impurities on the device physics.

1,693 citations