Our contribution is two fold: first we describe a very compact hardware implementation of AES-128, which requires only 2400 GE. This is to the best of our knowledge the smallest implementation reported so far. Then we apply the threshold countermeasure by Nikova et al. to the AES S-box and yield an implementation of the AES improving the level of resistance against first-order side-channel attacks. Our experimental results on real-world power traces show that although our implementation provides additional security, it is still susceptible to some sophisticated attacks having enough number of measurements.

A More Efficient AES Threshold Implementation

This paper presents a demonstration of the new Licensed Shared Access (LSA) concept using a TD-LTE access network in the 2.3 GHz spectrum band in Finland. In the demonstrated trial, the TD-LTE network shares the spectrum of an incumbent spectrum user, who is focused on programme making and special events (PMSE) services. The demonstrator implements the new LSA concept and the required new building blocks including LSA Repository for spectrum protection information and LSA Controller for controlling the mobile communication network in the same band. The trial uses commercial network components like multiband-terminals, TD-L TE base stations, network management system, and core network. Spectrum usage data of incumbents is collected to LSA Repository using two incumbent user tools and is actively updated to LSA Controller for radio network planning to protect the incumbent's activity in the area. LSA Controller uses the information from the base stations and incumbents to protect incumbent spectrum users' rights. This is demonstrated by providing different algorithms, which analyze base stations and sectors that need to be reconfigured to prevent interference from LTE to incumbent (and vice versa). The demonstration shows that the new LSA concept can be implemented with existing network elements and a minimum amount of new components.

Presentation of paper (Licensed Shared Access (LSA) Trial Demonstration Using Real LTE Network)

The missing mass of a sequence is defined as the total probability of the elements that have not appeared or occurred in the sequence. Estimation of missing mass is an important ingredient in many practical applications in language modeling and ecology. Exponential tail bounds have been known for missing mass, and improving them results in better confidence in estimation. In this work, we improve upon the best-known left and right tail bounds for missing mass. For the left tail, our proof method is arguably simpler than prior methods and provides a better bound for small sample sizes. For the right tail, we provide a new bounding method for the moment generating function of a generalized version of missing mass that results in a noticeable improvement in the tail bound.

Concentration and Tail Bounds for Missing Mass

To date, no"information-theoretic"frameworks for reasoning about generalization error have been shown to establish minimax rates for gradient descent in the setting of stochastic convex optimization. In this work, we consider the prospect of establishing such rates via several existing information-theoretic frameworks: input-output mutual information bounds, conditional mutual information bounds and variants, PAC-Bayes bounds, and recent conditional variants thereof. We prove that none of these bounds are able to establish minimax rates. We then consider a common tactic employed in studying gradient methods, whereby the final iterate is corrupted by Gaussian noise, producing a noisy"surrogate"algorithm. We prove that minimax rates cannot be established via the analysis of such surrogates. Our results suggest that new ideas are required to analyze gradient descent using information-theoretic techniques.

Limitations of Information-Theoretic Generalization Bounds for Gradient Descent Methods in Stochastic Convex Optimization

Today, emerging technologies are reaching astronomical proportions. For example, the Internet of Things has numerous applications and consists of countless different devices using different technologies with different capabilities. But the one invariant is their connectivity. Consequently, secure communications, and cryptographic hardware as a means of providing them, are faced with new challenges. Cryptographic algorithms intended for hardware implementations must be designed with a good trade-off between implementation efficiency and sufficient cryptographic strength. Finite fields are widely used in cryptography. Examples of algorithm design choices related to finite field arithmetic are the field size, which arithmetic operations to use, how to represent the field elements, etc. As there are many parameters to be considered and analyzed, an automation framework is needed. This thesis proposes a framework for automated design, implementation and verification of finite field arithmetic hardware. The underlying motif throughout this work is “math meets hardware”. The automation framework is designed to bring the awareness of underlying mathematical structures to the hardware design flow. It is implemented in GAP, an open source computer algebra system that can work with finite fields and has symbolic computation capabilities. The framework is roughly divided into two phases, the architectural decisions and the automated design generation. The architectural decisions phase supports parameter search and produces a list of candidates. The automated design generation phase is invoked for each candidate, and the generated VHDL files are passed on to conventional synthesis tools. The candidates and their implementation results form the design space, and the framework allows rapid design space exploration in a systematic way. In this thesis, design space exploration is focused on finite field arithmetic. Three distinctive features of the proposed framework are the structure of finite fields, tower field support, and on the fly submodule generation. Each finite field used in the design is represented as both a field and its corresponding vector space. It is easy for a designer to switch between fields and vector spaces, but strict distinction of the two is necessary for hierarchical designs. When an expression is defined over an extension field, the top-level module contains element signals and submodules for arithmetic operations on those signals. The submodules are generated with corresponding vector signals and the arithmetic operations are now performed on the coordinates. For tower fields, the submodules are generated for the subfield operations, and the design is generated in a top-down fashion. The binding of expressions to the appropriate finite fields or vector spaces and a set of customized methods allow the on the fly generation of expressions for implementation of arithmetic operations, and hence submodule generation. In the light of NIST Lightweight Cryptography Project (LWC), this work focuses mainly on small finite fields. The thesis illustrates the impact of hardware implementation results during the design process of WAGE, a Round 2 candidate in the NIST LWC standardization competition. WAGE is a hardware oriented authenticated encryption scheme. The parameter selection for WAGE was aimed at balancing the security and hardware implementation area, using hardware implementation results for many design decisions, for example field size, representation of field elements, etc. In the proposed framework, the components of WAGE are used as an example to illustrate different automation flows and demonstrate the design space exploration on a real-world algorithm.

Automated Design Space Exploration and Datapath Synthesis for Finite Field Arithmetic with Applications to Lightweight Cryptography

Composite fields are used for implementing the advanced encryption standard (AES) SBox when compact and side-channel resistant constructions are required. The prior art has investigated efficient implementations of such SBoxes for application specific integrated circuit (ASIC) platforms. On field programmable gate arrays (FPGAs); however, due to the considerably different structure compared with ASICs, these implementations perform poorly. In this letter, we revisit composite field AES SBox implementations for FPGAs. We show how design choices and optimizations can be made to better suit the granular look-up tables that are present in modern FPGAs. We investigate 2880 SBox constructions and show that about half of them are better than the state-of-the-art composite field implementation. Our best SBox implementation is 18% smaller compared with the state-of-the-art implementation on an FPGA.

Revisiting AES SBox Composite Field Implementations for FPGAs

The missing mass of a sequence is defined as the total probability of the elements that have not appeared or occurred in the sequence. The popular Good-Turing estimator for missing mass has been used extensively in language modeling and ecological studies. Exponential tail bounds have been known for missing mass, and improving them results in better confidence in estimation. In this work, we first show that missing mass is sub-Gamma on the right tail with the best-possible variance parameter under the Poisson and multinomial sampling models. This results in a right tail bound that beats the previously best known tail bound for deviation from mean up to about 0.2785. Further, we show that the sub-Gaussian approach cannot result in any improvement in the right tail bound for Poisson sampling. We derive confidence intervals for the Good-Turing estimator with better confidence levels and narrower width when compared to existing ones. Our results are worst case over all distributions.

Improved Tail Bounds for Missing Mass and Confidence Intervals for Good-Turing Estimator

We prove that every online learnable class of functions of Littlestone dimension d admits a learning algorithm with finite information complexity. Towards this end, we use the notion of a globally stable algorithm. Generally, the information complexity of such a globally stable algorithm is large yet finite, roughly exponential in d. We also show there is room for improvement; for a canonical online learnable class, indicator functions of affine subspaces of dimension d, the information complexity can be upper bounded logarithmically in d.

Finite Littlestone Dimension Implies Finite Information Complexity

Supporting Public Protection and Disaster Relief (PPDR) services are mandatory in modern wireless access networks. The sub-1GHz band is particularly suited to provide PPDR services due to the better propagation characteristics and attendant increase in link budget. In this work, we describe a novel transmit mode under a multi-operator non-orthogonal spectrum sharing framework, which can provide robust PPDR waveforms. This Ultra-Reliable Broadcast (URB) solution is based on the Licensed Shared Simultaneous Access (LSSA) broadband wireless access system which has been designed earlier by our group to provide much higher sum-rates in each cell when compared to a single-operator network, by enabling synchronization and different levels of co-operation across multiple TDD operators simultaneously using the same air-interface technology in the same spectrum. Using 19-cell system simulation with appropriate fractional frequency reuse scenarios, we compare the post-processing SINR CDFs of the 4 operator LSSA network and a single operator network, when both of these broadcast a single network-wide PPDR message. Their performances are also compared under disaster conditions where with a probability p, any of the eNodeBs can suddenly fail. We develop and use a simple 3-D stochastic path-loss model to account for users in multi-storey buildings, where depending on the user location the mean value of the shadow loss is varied. Our simulation results in the UHF band (500MHz carrier frequency) indicate that at the 10th percentile of the CDF, under normal operating conditions, the proposed URB solution with four LSSA operators can provide more than 10dB gain in SINR, and for p=0.5, this gain increases to 14dB, when compared to the single operator system.

Aditya Pradeep

Papers

Revisiting AES SBox Composite Field Implementations for FPGAs

Improved Tail Bounds for Missing Mass and Confidence Intervals for Good-Turing Estimator

Finite Littlestone Dimension Implies Finite Information Complexity

Ultra-Reliable PPDR Broadcast using Licensed Simultaneously Shared Access networks