Adrian Powell

Bio: Adrian Powell is an academic researcher from Cree Inc.. The author has contributed to research in topics: Silicon carbide & Wafer. The author has an hindex of 31, co-authored 93 publications receiving 2808 citations. Previous affiliations of Adrian Powell include IBM.

SiC materials-progress, status, and potential roadblocks

Abstract: SiC materials are currently metamorphosing from research and development into a market driven manufacturing product. SiC substrates are currently used as the base for a large fraction of the world production of green, blue, and ultraviolet light-emitting diodes (LEDs). Emerging markets for SiC homoepitaxy include high-power switching devices and microwave devices for S and X band. Applications for heteroepitaxial GaN-based structures on SiC substrates include LEDs and microwave devices. In this paper we review the properties of SiC, assess the current status of substrate and epitaxial growth, and outline our expectations for SiC in the future.

New approach to the growth of low dislocation relaxed SiGe material

Abstract: In this growth process a new strain relief mechanism operates, whereby the SiGe epitaxial layer relaxes without the generation of threading dislocations within the SiGe layer. This is achieved by depositing SiGe on an ultrathin silicon on insulator (SOI) substrate with a superficial silicon thickness less than the SiGe layer thickness. Initially, the thin Si layer is put under tension due to an equalization of the strain between the Si and SiGe layers. Thereafter, the strain created in the thin Si layer relaxes by plastic deformation. Since the dislocations are formed and glide in the thin Si layer, no threading dislocation is ever introduced in to the upper SiGe material, which appeared dislocation free to the limit of the cross sectional transmission electron microscopy analysis. We thus have a method for producing very low dislocation, relaxes SiGe films with the additional benefit of an SOI substrate.

Production of substrate for tensilely strained semiconductor

Abstract: A process and method for producing strained and defect free semiconductor layers. In a preferred embodiment, silicon on insulator may be used as a substrate for the growth of fully relaxed SiGe buffer layers. A new strain relief mechanism operates, whereby the SiGe layer relaxes without the generation of threading dislocations within the SiGe layer. This is achieved by depositing SiGe on an SOI substrate with a superficial silicon thickness. Initially the strain in the SiGe layer becomes equalized with the thin Si layer by creating tensile strain in the Si layer. Then the strain created in the thin Si layer is relaxed by plastic deformation during an anneal. Since dislocations are formed, and glide in the thin Si layer, threading dislocations are not introduced into the upper SiGe material. A strained silicon layer for heterostructures may then be formed on the SiGe material.

Carrier concentration and lattice absorption in bulk and epitaxial silicon carbide determined using infrared ellipsometry

Abstract: We have measured the dielectric function of bulk nitrogen-doped 4H and 6H SiC substrates from 700 to 4000 ${\mathrm{cm}}^{\mathrm{\ensuremath{-}}1}$ using Fourier-transform infrared spectroscopic ellipsometry. Photon absorption by transverse optical phonons produces a strong reststrahlen band between 797 and 1000 ${\mathrm{cm}}^{\mathrm{\ensuremath{-}}1}$ with the effects of phonon anisotropy being observed in the region of the longitudinal phonon energy (960 to 100 ${\mathrm{cm}}^{\mathrm{\ensuremath{-}}1}$). The shape of this band is influenced by plasma oscillations of free electrons, which we describe with a classical Drude equation. For the 6H-SiC samples, we modify the Drude equation to account for the strong effective mass anisotropy. Detailed numerical regression analysis yields the free-electron concentrations, which range from $7\ifmmode\times\else\texttimes\fi{}{10}^{17}$ to ${10}^{19}{\mathrm{cm}}^{\mathrm{\ensuremath{-}}3},$ in good agreement with electrical and secondary ion mass spectrometry measurements. Finally, we observe the Berreman effect near the longitudinal optical phonon energy in $n\ensuremath{-}/n+$ homoepitaxial 4H SiC and hydrogen implanted samples, and we are able to determine the thickness of these surface layers.

Surface roughening in ion implanted 4H-silicon carbide

Abstract: Silicon carbide (SiC) devices have the potential to yield new components with functional capabilities that far exceed components based on silicon devices. Selective doping of SiC by ion implantation is an important fabrication technology that must be completely understood if SiC devices are to achieve their potential. One major problem with ion implantation into SiC is the surface roughening that results from annealing SiC at the high temperatures which are needed to activate implanted acceptor ions, boron or aluminum. This paper examines the causes and possible solutions to surface roughening of implanted and annealed 4H-SiC. Samples consisting of n-type epilayers (5 × 1015 cm−3, 4 µm thick) on 4H-SiC substrates were implanted with B or Al to a total dose of 4 × 1014 cm−2 or 2 × 1015 cm−2, respectively. Roughness measurements were made using atomic force microscopy. From the variation of root mean square (rms) roughness with annealing temperature, apparent activation energies for roughening following implantation with Al and B were 1.1 and 2.2 eV, respectively, when annealed in argon. Time-dependent activation and surface morphology analyses show a sublinear dependence of implant activation on time; activation percentages after a 5 min anneal following boron implantation are about a factor of two less than after a 40 min anneal. The rms surface roughness remained relatively constant with time for anneals in argon at 1750°C. Roughness values at this temperature were approximately 8.0 nm. Annealing experiments performed in different ambients demonstrated the benefits of using silane to maintain good surface morphology. Roughnesses were 1.0 nm (rms) when boron or aluminum implants were annealed in silane at 1700°C, but were about 8 and 11 nm for B and Al, respectively, when annealed in argon at the same temperature.

Epitaxial core–shell and core–multishell nanowire heterostructures

Abstract: Semiconductor heterostructures with modulated composition and/or doping enable passivation of interfaces and the generation of devices with diverse functions. In this regard, the control of interfaces in nanoscale building blocks with high surface area will be increasingly important in the assembly of electronic and photonic devices. Core-shell heterostructures formed by the growth of crystalline overlayers on nanocrystals offer enhanced emission efficiency, important for various applications. Axial heterostructures have also been formed by a one-dimensional modulation of nanowire composition and doping. However, modulation of the radial composition and doping in nanowire structures has received much less attention than planar and nanocrystal systems. Here we synthesize silicon and germanium core-shell and multishell nanowire heterostructures using a chemical vapour deposition method applicable to a variety of nanoscale materials. Our investigations of the growth of boron-doped silicon shells on intrinsic silicon and silicon-silicon oxide core-shell nanowires indicate that homoepitaxy can be achieved at relatively low temperatures on clean silicon. We also demonstrate the possibility of heteroepitaxial growth of crystalline germanium-silicon and silicon-germanium core-shell structures, in which band-offsets drive hole injection into either germanium core or shell regions. Our synthesis of core-multishell structures, including a high-performance coaxially gated field-effect transistor, indicates the general potential of radial heterostructure growth for the development of nanowire-based devices.

A Survey of Wide Bandgap Power Semiconductor Devices

Abstract: Wide bandgap semiconductors show superior material properties enabling potential power device operation at higher temperatures, voltages, and switching speeds than current Si technology. As a result, a new generation of power devices is being developed for power converter applications in which traditional Si power devices show limited operation. The use of these new power semiconductor devices will allow both an important improvement in the performance of existing power converters and the development of new power converters, accounting for an increase in the efficiency of the electric energy transformations and a more rational use of the electric energy. At present, SiC and GaN are the more promising semiconductor materials for these new power devices as a consequence of their outstanding properties, commercial availability of starting material, and maturity of their technological processes. This paper presents a review of recent progresses in the development of SiC- and GaN-based power semiconductor devices together with an overall view of the state of the art of this new device generation.

Semiconductor device, and manufacturing method thereof

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Defects in ZnO

Abstract: Zinc oxide (ZnO) is a wide band gap semiconductor with potential applications in optoelectronics, transparent electronics, and spintronics. The high efficiency of UV emission in this material could be harnessed in solid-state white lighting devices. The problem of defects, in particular, acceptor dopants, remains a key challenge. In this review, defects in ZnO are discussed, with an emphasis on the physical properties of point defects in bulk crystals. As grown, ZnO is usually n-type, a property that was historically ascribed to native defects. However, experiments and theory have shown that O vacancies are deep donors, while Zn interstitials are too mobile to be stable at room temperature. Group-III (B, Al, Ga, and In) and H impurities account for most of the n-type conductivity in ZnO samples. Interstitial H donors have been observed with IR spectroscopy, while substitutional H donors have been predicted from first-principles calculations but not observed directly. Despite numerous reports, reliable p-t...

High-temperature electronics - a role for wide bandgap semiconductors?

Abstract: The fact that wide bandgap semiconductors are capable of electronic functionality at much higher temperatures than silicon has partially fueled their development, particularly in the case of SiC. It appears unlikely that wide bandgap semiconductor devices will find much use in low-power transistor applications until the ambient temperature exceeds approximately 300/spl deg/C, as commercially available silicon and silicon-on-insulator technologies are already satisfying requirements for digital and analog VLSI in this temperature range. However practical operation of silicon power devices at ambient temperatures above 200/spl deg/C appears problematic, as self-heating at higher power levels results in high internal junction temperatures and leakages. Thus, most electronic subsystems that simultaneously require high-temperature and high-power operation will necessarily be realized using wide bandgap devices, once they become widely available. Technological challenges impeding the realization of beneficial wide bandgap high ambient temperature electronics, including material growth, contacts, and packaging, are briefly discussed.