Ahmed Mohamed Abdelatty Ali

Bio: Ahmed Mohamed Abdelatty Ali is an academic researcher from Analog Devices. The author has contributed to research in topics: Signal & Amplifier. The author has an hindex of 19, co-authored 80 publications receiving 1341 citations. Previous affiliations of Ahmed Mohamed Abdelatty Ali include University of Pennsylvania & Texas Instruments.

A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration

Abstract: This paper describes a 16-bit 250 MS/s ADC fabricated on a 0.18 BiCMOS process. The ADC has an integrated input buffer with a new linearization technique that improves its distortion by 5-10 dB and lowers its power consumption by 70% relative to the state of the art. It demonstrates a new background calibration technique to correct the residue amplifier (RA) gain errors and lower its power consumption. This summing node sampling (SNS) calibration technique is based on sampling the summing-node voltage of the residue amplifier and using it with the corresponding residue to estimate the amplifier open loop gain. The ADC achieves an SNDR of 76.5 dB and consumes 850 mW from a 1.8 V supply, while the input buffer consumes 150 mW from a 3 V supply. Up to 125 MS/s, the SFDR is greater than 100 dB for input frequencies up to 100 MHz and 90 dB up to 300 MHz input frequency. At 250 MS/s, the SFDR is greater than 95 dB up to 100MHz and 85 dB up to 300 MHz.

A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter

Abstract: This paper describes a 14-bit, 125 MS/s IF/RF sampling pipelined A/D converter (ADC) that is implemented in a 0.35mum BiCMOS process. The ADC has a sample-and-hold circuit that is integrated in the first pipeline stage, which removes the need for a dedicated sample-and-hold amplifier (i.e., "SHA-less"). It also has a sampling buffer that is turned off during the hold clock phases to save power. To accurately estimate and minimize the clock jitter, a new jitter simulation technique was used whose results were verified on silicon. The measured silicon results indicate the highest published IF sampling performance to date and prove the viability of the "SHA-less" architecture for IF/RF sampling ADCs. The ADC is calibration-free and achieves a DNL of less than 0.2 LSB and INL of 0.8 LSB. The SNR is 75 dB below Nyquist, and stays above 71 dB up to 500 MHz. The low-frequency SFDR is about 100 dB, and stays above 90 dB up to about 300 MHz. This is also the first ADC to achieve 14-bit level performance for input signal frequencies up to 500 MHz and to have a total RMS jitter of only 50 fs

A 14-bit 125 MS/s IF/RF sampling pipelined ADC with 100 dB SFDR and 50 fs jitter

Abstract: This paper describes a 14-bit, 125 MS/s IF/RF sampling pipelined A/D converter (ADC) that is implemented in a 0.35 μm BiCMOS process. The ADC has a sample-and-hold circuit that is integrated in the first pipeline stage, which removes the need for a dedicated sample-and-hold amplifier (i.e., "SHA-less"). It also has a sampling buffer that is turned off during the hold clock phases to save power. To accurately estimate and minimize the clock jitter, a new jitter simulation technique was used whose results were verified on silicon. The measured silicon results indicate the highest published IF sampling performance to date and prove the viability of the "SHA-less" architecture for IF/RF sampling ADCs. The ADC is calibration-free and achieves a DNL of less than 0.2 LSB and INL of 0.8 LSB. The SNR is 75 dB below Nyquist, and stays above 71 dB up to 500 MHz. The low-frequency SFDR is about 100 dB, and stays above 90 dB up to about 300 MHz. This is also the first ADC to achieve 14-bit level performance for input signal frequencies up to 500 MHz and to have a total RMS jitter of only 50 fs.

Acoustic-phonetic features for the automatic classification of stop consonants

Abstract: In this paper, the acoustic-phonetic characteristics of the American English stop consonants are investigated. Features studied in the literature are evaluated for their information content and new features are proposed. A statistically guided, knowledge-based, acoustic-phonetic system for the automatic classification of stops, in speaker independent continuous speech, is proposed. The system uses a new auditory-based front-end processing and incorporates new algorithms for the extraction and manipulation of the acoustic-phonetic features that proved to be rich in their information content. Recognition experiments are performed using hard decision algorithms on stops extracted from the TIMIT database continuous speech of 60 speakers (not used in the design process) from seven different dialects of American English. An accuracy of 96% is obtained for voicing detection, 90% for place of articulation detection and 86% for the overall classification of stops.

A 12-b 18-GS/s RF Sampling ADC With an Integrated Wideband Track-and-Hold Amplifier and Background Calibration

Abstract: We discuss a 12-b 18-GS/s analog-to-digital converter (ADC) implemented in 16-nm FinFET process. The ADC is composed of an integrated high-speed track-and-hold amplifier (THA) driving up to eight interleaved pipeline ADCs that employ open-loop inter-stage amplifiers. Up to 10 GS/s, the THA operates at the full sampling rate using a non-interleaved single sample network, thereby eliminating the interleaving sampling time and bandwidth mismatch. Above 10 GS/s, the THA is programmed to use two ping-ponged, or an optional (2 + 1) randomized, sample networks to spread the residual post-calibration interleaving spurs in the noise floor. The THA enables an input bandwidth of 18 GHz and employs dither injection and optional pseudorandom chopping. In the pipeline stages, dither-based background calibration detects and corrects gain, settling, memory, and kick-back errors. New dither-based background calibration algorithms are employed to detect and correct the arbitrary non-linearity in the form of integral non-linearity (INL) breaks and harmonic distortion up to the fifth order in the THA and in the references, DACs, and inter-stage open-loop amplifiers of the pipeline ADCs. Moreover, new dither-based background calibration is implemented to detect and correct the chopping non-idealities, memory errors, interleaving mismatches, and order-dependent randomization errors. Compared to the fastest state-of-the-art with similar performance, this ADC achieves 80% higher sample rate and 2.4 $\times $ higher input bandwidth, and incorporates a THA that supports a 3.3 $\times $ higher non-interleaved sample rate.

An overview of noise-robust automatic speech recognition

Abstract: New waves of consumer-centric applications, such as voice search and voice interaction with mobile devices and home entertainment systems, increasingly require automatic speech recognition (ASR) to be robust to the full range of real-world noise and other acoustic distorting conditions. Despite its practical importance, however, the inherent links between and distinctions among the myriad of methods for noise-robust ASR have yet to be carefully studied in order to advance the field further. To this end, it is critical to establish a solid, consistent, and common mathematical foundation for noise-robust ASR, which is lacking at present. This article is intended to fill this gap and to provide a thorough overview of modern noise-robust techniques for ASR developed over the past 30 years. We emphasize methods that are proven to be successful and that are likely to sustain or expand their future applicability. We distill key insights from our comprehensive overview in this field and take a fresh look at a few old problems, which nevertheless are still highly relevant today. Specifically, we have analyzed and categorized a wide range of noise-robust techniques using five different criteria: 1) feature-domain vs. model-domain processing, 2) the use of prior knowledge about the acoustic environment distortion, 3) the use of explicit environment-distortion models, 4) deterministic vs. uncertainty processing, and 5) the use of acoustic models trained jointly with the same feature enhancement or model adaptation process used in the testing stage. With this taxonomy-oriented review, we equip the reader with the insight to choose among techniques and with the awareness of the performance-complexity tradeoffs. The pros and cons of using different noise-robust ASR techniques in practical application scenarios are provided as a guide to interested practitioners. The current challenges and future research directions in this field is also carefully analyzed.

Robust speech recognition using articulatory information

Abstract: Current automatic speech recognition systems make use of a single source of information about their input, viz a preprocessed form of the acoustic speech signal, which encodes the time-frequency distribution of signal energy The goal of this thesis is to investigate the benefits of integrating articulatory information into state-of-the art speech recognizers, either as a genuine alternative to standard acoustic representations, or as an additional source of information Articulatory information is represented in terms of abstract articulatory classes or "features", which are extracted from the speech signal by means of statistical classifiers A higher-level classifier then combines the scores for these features and maps them to standard subword unit probabilities The main motivation for this approach is to improve the robustness of speech recognition systems in adverse acoustic environments, such as background noise Typically, recognition systems show a sharp decline of performance under these conditions We argue and demonstrate empirically that the articulatory feature approach can lead to greater robustness by enhancing the accuracy of the bottom-up acoustic modeling component in a speech recognition system The second focus point of this thesis is to provide detailed analyses of the different types of information provided by the acoustic and the articulatory representations, respectively, and to develop strategies to optimally combine them To this effect we investigate combination methods at the levels of feature extraction, subword unit probability estimation, and word recognition The feasibility of this approach is demonstrated with respect to two different speech recognition tasks The first of these is an American English corpus of telephone-bandwidth speech; the recognition domain is continuous numbers The second is a German database of studio-quality speech consisting of spontaneous dialogues In both cases recognition performance will be tested not only under clean acoustic conditions but also under deteriorated conditions

Hybrid Architectures With Few-Bit ADC Receivers: Achievable Rates and Energy-Rate Tradeoffs

Abstract: Hybrid analog/digital architectures and receivers with low-resolution analog-to-digital converters (ADCs) are two low power solutions for wireless systems with large antenna arrays, such as millimeter wave and massive multiple-input multiple-output systems. Most prior work represents two extreme cases in which either a small number of radio frequency (RF) chains with full-resolution ADCs, or low-resolution ADC with a number of RF chains equal to the number of antennas is assumed. In this paper, a generalized hybrid architecture with a small number of RF chains and a finite number of ADC bits is proposed. For this architecture, achievable rates with channel inversion and singular value decomposition-based transmission methods are derived. Results show that the achievable rate is comparable to that obtained by full-precision ADC receivers at low and medium SNRs. A trade-off between the achievable rate and power consumption for the different numbers of bits and RF chains is devised. This enables us to draw some conclusions on the number of ADC bits needed to maximize the system energy efficiency. Numerical simulations show that coarse ADC quantization is optimal under various system configurations. This means that hybrid combining with coarse quantization achieves better energy-rate trade-off compared with both hybrid combining with full-resolutions ADCs and 1-bit ADC combining.

Refining of segmental boundaries in speech waveforms using contextual-dependent models

Abstract: A method and apparatus are provided for refining segmental boundaries in speech waveforms. Contextual acoustic feature similarities are used as a basis for clustering adjacent phoneme speech units, where each adjacent pair phoneme speech units include a segmental boundary. A refining model is trained for each cluster and used to refine boundaries of contextual phoneme speech units forming the clusters.