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Akira Kojima

Bio: Akira Kojima is an academic researcher from Tohoku University. The author has contributed to research in topics: Nanocrystalline silicon & Porous silicon. The author has an hindex of 19, co-authored 111 publications receiving 1027 citations. Previous affiliations of Akira Kojima include Tokyo Institute of Technology & Dr Emilio B Espinosa Sr Memorial State College of Agriculture and Technology.


Papers
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Journal ArticleDOI
TL;DR: In this paper, the effects of a treatment based on high pressure water vapor annealing (HWA) on nanocrystalline porous silicon have been investigated in terms of the photoluminescence (PL) efficiency and stability.
Abstract: The effects of a treatment based on high-pressure water vapor annealing (HWA) on nanocrystalline porous silicon have been investigated in terms of the photoluminescence (PL) efficiency and stability. For originally nonluminescent samples with a relatively low porosity, the treatment produces highly efficient and stable luminescent nanocrystalline-Si (nc-Si) layers without affecting the emission wavelength. Under appropriate conditions of pressure (2.6 MPa) and temperature (260 °C), the PL external quantum efficiency reaches 23% at room temperature. Electron-spin-resonance and infrared absorption analyses show that the HWA treatment promotes surface oxidation of nc-Si under a minimized mechanical stress and consequently generates sufficiently passivated nc-Si∕SiO2 interfaces with an extremely low nonradiative defect density. This causes a drastic enhancement in the PL efficiency associated with a strong localization of excitons in nc-Si. As a practical approach, the HWA technique is very useful for fabrica...

142 citations

Journal ArticleDOI
TL;DR: In this article, a planar-type visible light emission using ballistic electrons as excitation source was presented, which is composed of a semitransparent top electrode, a thin film of fluorescent material, a nanocrystalline porous silicon (nc-PS) layer, an n-type silicon wafer, and an ohmic back contact.
Abstract: A principle of planar-type visible light emission is presented using ballistic electrons as excitation source. The device is composed of a semitransparent top electrode, a thin film of fluorescent material, a nanocrystalline porous silicon (nc-PS) layer, an n-type silicon wafer, and an ohmic back contact. When a positive dc voltage is applied to the top electrode with respect to the substrate, electrons injected into the nc-PS layer are accelerated via multiple-tunneling through interconnected silicon nanocrystallites, and reach the outer surface as energetic hot or quasiballistic electrons. They directly excite the fluorescent film, and then induce uniform visible luminescence. This solid-state light-emitting device, regarded as a “vacuum-less cathode-ray tube,” has many technological advantages over the conventional luminescent devices. It may lead to big innovations in the development of large-area thin flat-panel display and other electronic devices.

59 citations

Journal ArticleDOI
TL;DR: In this article, a GaN-based short-wavelength laser diodes are used for a digital versatile disk, where the optical guiding layers, mirror facets, and multi low temperature buffer layers are applied to reduce the crystal defects, which reduces the threshold current to 60 mA (4 kA/cm2).
Abstract: GaN-based short wavelength laser diodes are the most promising key device for a digital versatile disk. We have been improving the important points of the laser diodes in terms of optical guiding layers, mirror facets. The continuous wave laser irradiation at room temperature could be achieved successfully by reducing the threshold current to 60 mA (4 kA/cm2). We have tried to apply the multi low temperature buffer layers to the laser diodes for the first time to reduce the crystal defects.

39 citations

Journal ArticleDOI
TL;DR: In this article, a massively parallel electron beam direct write (MPEBDW) system was proposed for high-speed massively parallel NN-EB lithography using an active-matrix-driving complementary metal-oxide semiconductor (CMOS) large-scale integration (LSI) system.
Abstract: Nanoscale lithographic technologies have been intensively studied for the development of the next generation of semiconductor manufacturing practices. While mask-less/direct-write electron beam (EB) lithography methods serve as a candidate for the upcoming 10-nm node approaches and beyond, it remains difficult to achieve an appropriate level of throughput. Several innovative features of the multiple EB system that involve the use of a thermionic source have been proposed. However, a blanking array mechanism is required for the individual control of multiple beamlets whereby each beamlet is deflected onto a blanking object or passed through an array. This paper reviews the recent developments of our application studies on the development of a high-speed massively parallel electron beam direct write (MPEBDW) lithography. The emitter array used in our study includes nanocrystalline-Si (nc-Si) ballistic electron emitters. Electrons are drifted via multiple tunnelling cascade transport and are emitted as hot electrons. The transport mechanism allows one to quickly turn electron beamlets on or off. The emitter array is a micro-electro-mechanical system (MEMS) that is hetero-integrated with a separately fabricated active-matrix-driving complementary metal-oxide semiconductor (CMOS) large-scale integration (LSI) system that controls each emitter individually. The basic function of the LSI was confirmed to receive external writing bitmap data and generate driving signals for turning beamlets on or off. Each emitted beamlet (10 × 10 μm2) is converged to 10 × 10 nm2 on a target via the reduction electron optic system under development. This paper presents an overview of the system and characteristic evaluations of the nc-Si emitter array. We examine beamlets and their electron emission characteristics via a 1:1 exposure test. Electron-beam lithography is becoming a crucial tool for semiconductor manufacturers that produce circuit patterns smaller than 10 nanometers. Masayoshi Esashi at Tohoku University, Japan, and colleagues chart their efforts to improve the low throughput level of this technique using arrays of nanocrystalline silicon electron emitters that emit thousands of ‘hot’ electron beams simultaneously. By integrating the electron-emitter array with an LSI, the team's Massively Parallel Electron Beam Direct Writing (MPEBDW) system can switch the beams on or off at high speed, similar to pixels in a computer display. The prototype uses a 100 × 100 emitter array and a reduction electron-optical system to converge the 100 × 100 pixels of 10 × 10 nanometers beams onto targets. This maskless method of nanoscale patterning makes MPEBDW less expensive and more flexible than conventional lithographic procedures.

39 citations

Patent
17 Jul 2003
TL;DR: In this paper, a seed layer as a laminate of a GaN layer and an AlN buffer layer is formed on a sapphire substrate, and a front surface thereof is etched in the form of stripes with a stripe width (seed width) of about 5 μm, a wing width of about 15 μm and a depth of about 0.5 μm.
Abstract: A seed layer as a laminate of a GaN layer (second seed layer) and an AlN buffer layer (first seed layer) is formed on a sapphire substrate. A front surface thereof is etched in the form of stripes with a stripe width (seed width) of about 5 μm, a wing width of about 15 μm and a depth of about 0.5 μm. As a result, mesa portions each shaped like nearly a rectangle in sectional view are formed. Non-etched portions each having the seed multilayer as its flat top portion are arranged at arrangement intervals of L≈20 μm. Part of the sapphire substrate is exposed in trough portions of wings. The ratio S/W of the seed width to the wing width is preferably selected to be in a range of from about ⅓ to about ⅕. Then, a semiconductor crystal A is grown to obtain a thickness of not smaller than 50 μm. The semiconductor crystal is separated from the starting substrate to thereby obtain a high-quality single crystal independent of the starting substrate. When a halide vapor phase epitaxy method is used in the condition that the V/III ratio is selected to be in a range of from 30 to 80, both inclusively, a semiconductor crystal free from cracks can be obtained.

32 citations


Cited by
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01 Jan 1999
TL;DR: Damascene copper electroplating for on-chip interconnections, a process that was conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition as discussed by the authors.
Abstract: Damascene copper electroplating for on-chip interconnections, a process that we conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition. We discuss here the relationship of additives in the plating bath to superfilling, the phenomenon that results in superconformal coverage, and we present a numerical model which accounts for the experimentally observed profile evolution of the plated metal.

1,006 citations

Journal ArticleDOI
TL;DR: In this article, a detailed description of the conduction mechanism and the main parameters that control the conductivity of ITO films are presented, on account of the large varieties and differences in the fabrication techniques.
Abstract: Tin doped indium oxide (ITO) films are highly transparent in the visible region, exhibiting high reflectance in the infrared region, and having nearly metallic conductivity. Owing to this unusual combination of electrical and optical properties, this material is widely applied in optoelectronic devices. The association of these properties in a single material explains the vast domain of its applicability and the diverse production methods which have emerged. Although the different properties of tin doped indium oxide in the film form are interdependent, this article mainly focuses on the electrical aspects. Detailed description of the conduction mechanism and the main parameters that control the conductivity is presented. On account of the large varieties and differences in the fabrication techniques, the electrical properties of ITO films are discussed and compared within each technique.

876 citations

Journal ArticleDOI
08 Mar 2007-Nature
TL;DR: A low-temperature (650 °C) magnesiothermic reduction process for converting three-dimensional nanostructured silica micro-assemblies into microporous nanocrystalline silicon replicas that retained the starting three- dimensional frustule morphology is demonstrated.
Abstract: The carbothermal reduction of silica into silicon requires the use of temperatures well above the silicon melting point (> or =2,000 degrees C). Solid silicon has recently been generated directly from silica at much lower temperatures ( 500 m(2) g(-1)), and contained a significant population of micropores (< or =20 A). The silicon replicas were photoluminescent, and exhibited rapid changes in impedance upon exposure to gaseous nitric oxide (suggesting a possible application in microscale gas sensing). This process enables the syntheses of microporous nanocrystalline silicon micro-assemblies with multifarious three-dimensional shapes inherited from biological or synthetic silica templates for sensor, electronic, optical or biomedical applications.

724 citations

Journal ArticleDOI
R. J. Joenk1
TL;DR: Background information about the IBM Journal of Research and Development is combined with guidelines for the preparation of Journal manuscripts to acquaint authors with the Journal as a primary, professional publication and to present suggestions to ease the work of author and editor in preparing clear, concise, and useful manuscripts.
Abstract: This paper combines background information about the IBM Journal of Research and Development with guidelines for the preparation of Journal manuscripts. The purpose is to acquaint authors with the Journal as a primary, professional publication and to present suggestions to ease the work of author and editor in preparing clear, concise, and useful manuscripts.

399 citations

Journal ArticleDOI
TL;DR: This critical review focuses on the solution deposition of transparent conductors with a particular focus on transparent conducting oxide (TCO) thin-films, with an introduction into the applications of and material criteria for TCOs.
Abstract: This critical review focuses on the solution deposition of transparent conductors with a particular focus on transparent conducting oxide (TCO) thin-films TCOs play a critical role in many current and emerging opto-electronic devices due to their unique combination of electronic conductivity and transparency in the visible region of the spectrum Atmospheric-pressure solution processing is an attractive alternative to conventional vacuum-based deposition methods due to its ease of fabrication, scalability, and potential to lower device manufacturing costs An introduction into the applications of and material criteria for TCOs will be presented first, followed by a discussion of solution routes to these systems Recent studies in the field will be reviewed according to their materials system Finally, the challenges and opportunities for further enabling research will be discussed in terms of emerging oxide systems and non-oxide based transparent conductors (341 references)

347 citations