Author
Akira Takenouchi
Bio: Akira Takenouchi is an academic researcher. The author has contributed to research in topics: Semiconductor device & Integrated circuit. The author has an hindex of 4, co-authored 7 publications receiving 284 citations.
Papers
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Patent•
26 Jul 1994
TL;DR: In this article, the first oxide film has a good interface condition with the semiconductor film, and a characteristics of an insulated gate field effect transistor can be improved if the oxide film and the second oxide film are used as a gate insulating film.
Abstract: A method for manufacturing a semiconductor device comprises the steps of forming a semiconductor film on a substrate, oxidizing a surface of said semiconductor film in an oxidizing atmosphere with said semiconductor film heated or irradiated with light, and further depositing an oxide film on the oxidized surface of the semiconductor film by PVD or CVD The first oxide film has a good interface condition with the semiconductor film and a characteristics of an insulated gate field effect transistor can be improved if the first oxide film and the second oxide film are used as a gate insulating film
161 citations
Patent•
12 Feb 1997
TL;DR: In this paper, a multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits is described. But the system is not suitable for large-scale fabrication.
Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.
53 citations
Patent•
03 Jun 1996
TL;DR: In this article, a multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits is described. But the system is not suitable for large-scale fabrication.
Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.
48 citations
Patent•
02 Aug 1996
TL;DR: In this article, a multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits is described. But the system is not suitable for large-scale fabrication.
Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one of these vacuum apparatuses is a laser.
20 citations
Patent•
15 Nov 1999
TL;DR: In this paper, a multi-chamber system for providing a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits is presented, which comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber).
Abstract: A multi-chamber system for providing a process of a high degree of cleanliness in fabricating semiconductor devices such as semiconductor integrated circuits. The system comprises a plurality of vacuum apparatus (e.g., a film formation apparatus, an etching apparatus, a thermal processing apparatus, and a preliminary chamber) for fabrication of semiconductor devices. At least one these vacuum apparatuses is a laser.
1 citations
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Patent•
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.
1,501 citations
Patent•
22 Dec 2004
TL;DR: In this article, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer, a thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising silicon oxide film formed on the thin film.
Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer A thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiO x N y Also, a thin film comprising SiO x N y is formed under the active layer The active layer includes a metal element at a concentration of 1×10 15 to 1×10 19 cm −3 and hydrogen at a concentration of 2×10 19 to 5×10 21 cm −3
719 citations
Patent•
08 Jan 2003
TL;DR: In this paper, an active matrix display (AMD) with pixel electrodes, gate wirings and source wires is proposed, in which pixel electrodes are arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the amount of steps.
Abstract: An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.
432 citations
Patent•
24 Mar 2011
TL;DR: In this article, the luminance of the EL elements of each in the display pixels is controlled in accordance with the amount of electric current flowing in each of the diodes, which is a function of the environment.
Abstract: To provide a semiconductor display device capable of displaying an image having clarity and a desired color, even when the speed of deterioration of an EL layer is influenced by its environment. Display pixels and sensor pixels of an EL display each have an EL element, and the sensor pixels each have a diode. The luminance of the EL elements of each in the display pixels is controlled in accordance with the amount of electric current flowing in each of the diodes.
334 citations
Patent•
23 Mar 2005
TL;DR: In this paper, a gate overlapping structure is realized with the side wall functioning as an electrode, where the first impurity region is formed to be overlapped with a side wall.
Abstract: An active layer of an NTFT includes a channel forming region, at least a first impurity region, at least a second impurity region and at least a third impurity region therein. Concentrations of an impurity in each of the first, second and third impurity regions increase as distances from the channel forming region become longer. The first impurity region is formed to be overlapped with a side wall. A gate overlapping structure can be realized with the side wall functioning as an electrode.
328 citations