Alain Fourmigue

Bio: Alain Fourmigue is an academic researcher from École Polytechnique de Montréal. The author has contributed to research in topics: Silicon photonics & Computer cooling. The author has an hindex of 6, co-authored 11 publications receiving 105 citations. Previous affiliations of Alain Fourmigue include École Normale Supérieure.

Thermal Aware Design Method for VCSEL-Based On-Chip Optical Interconnect

Abstract: Optical Network-on-Chip (ONoC) is an emerging technology considered as one of the key solutions for future generation on-chip interconnects. However, silicon photonic devices in ONoC are highly sensitive to temperature variation, which leads to a lower efficiency of Vertical-Cavity Surface-Emitting Lasers (VCSELs), a resonant wavelength shift of Microring Resonators (MR), and results in a lower Signal to Noise Ratio (SNR). In this paper, we propose a methodology enabling thermal-aware design for optical interconnects relying on CMOS-compatible VCSEL. Thermal simulations allow designing ONoC interfaces with low gradient temperature and analytical models allow evaluating the SNR.

Thermal aware design method for VCSEL-based on-chip optical interconnect

Abstract: Optical Network-on-Chip (ONoC) is an emerging technology considered as one of the key solutions for future generation on-chip interconnects. However, silicon photonic devices in ONoC are highly sensitive to temperature variation, which leads to a lower efficiency of Vertical-Cavity Surface-Emitting Lasers (VCSELs), a resonant wavelength shift of Microring Resonators (MR), and results in a lower Signal to Noise Ratio (SNR). In this paper, we propose a methodology enabling thermal-aware design for optical interconnects relying on CMOS-compatible VCSEL. Thermal simulations allow designing ONoC interfaces with low gradient temperature and analytical models allow evaluating the SNR.

Efficient transient thermal simulation of 3D ICs with liquid-cooling and through silicon vias

Abstract: Three-dimensional integrated circuits (3D ICs) with advanced cooling systems are emerging as a viable solution for many-core platforms. These architectures generate a high and rapidly changing thermal flux. Their design requires accurate transient thermal models. Several models have been proposed, either with limited capabilities, or poor simulation performance. This work introduces an efficient algorithm based on the Finite Difference Method to compute the transient temperature in liquid-cooled 3D ICs. Our experiments show a 5x speedup versus state-of-the-art models, while maintaining the same level of accuracy, and demonstrate the effect of large through silicon vias arrays on thermal dissipation.

A linear-time approach for the transient thermal simulation of liquid-cooled 3d ics

Abstract: Due to their compact structure, three-dimensional integrated circuits (3D ICs) present thermal dissipation issues. Integrated microchannels are emerging as a viable solution to dissipate the heat flux generated by 3D ICs. Several models have been proposed in literature to study different microchannel designs, but generally with low simulation performance. In this paper, we present an efficient model to simulate the transient thermal behaviour of 3D ICs using microchannels. This work introduces a novel low-footprint model based on adaptive discretization grids to deal with the complex geometry of 3D ICs. Additionally, we use the operator splitting method to compute the transient temperature with linear time in the number of grid cells. Our approach is compared with state-of-the art models and reports a 100× speedup while maintaining the same level of accuracy. Finally, using our methodology we demonstrate the importance of modelling the contribution to thermal dissipation of through silicon vias used for power distribution, which are usually neglected in state-of-the-art contributions.

Transient Thermal Simulation of Liquid-Cooled 3-D Circuits

Abstract: The 3-D integrated circuits (3-D ICs) are emerging as a viable solution to enhance the performance of many-core platforms. These architectures generate a high and rapidly changing thermal flux that makes conventional air-cooled devices more susceptible to overheating. Liquid cooling is an alternative that can improve dissipation and reduce thermal issues. Fast and accurate thermal models are needed to appropriately dimension the cooling system at design time. Several models have been proposed to study different designs, but generally with low simulation performance. In this paper, we present an efficient model of the transient thermal behavior of liquid-cooled 3-D ICs. This paper presents an approach with extremely low memory usage and advanced numerical methods to efficiently compute the transient temperature of 3-D ICs. Our experiments show the $100\times $ speedup versus the state-of-the-art models, while maintaining the same level of accuracy, and demonstrate the efficiency of liquid cooling to remove the heat from 3-D many-core platforms.

Numerical methods for engineers

Abstract: The fifth edition of "Numerical Methods for Engineers" continues its tradition of excellence. Instructors love this text because it is a comprehensive text that is easy to teach from. Students love it because it is written for them--with great pedagogy and clear explanations and examples throughout. The text features a broad array of applications, including all engineering disciplines. The revision retains the successful pedagogy of the prior editions. Chapra and Canale's unique approach opens each part of the text with sections called Motivation, Mathematical Background, and Orientation, preparing the student for what is to come in a motivating and engaging manner. Each part closes with an Epilogue containing sections called Trade-Offs, Important Relationships and Formulas, and Advanced Methods and Additional References. Much more than a summary, the Epilogue deepens understanding of what has been learned and provides a peek into more advanced methods. Approximately 80% of the end-of-chapter problems are revised or new to this edition. The expanded breadth of engineering disciplines covered is especially evident in the problems, which now cover such areas as biotechnology and biomedical engineering. Users will find use of software packages, specifically MATLAB and Excel with VBA. This includes material on developing MATLAB m-files and VBA macros.

Co-simulation: State of the art.

Abstract: It is essential to find new ways of enabling experts in different disciplines to collaborate more efficient in the development of ever more complex systems, under increasing market pressures. One possible solution for this challenge is to use a heterogeneous model-based approach where different teams can produce their conventional models and carry out their usual mono-disciplinary analysis, but in addition, the different models can be coupled for simulation (co-simulation), allowing the study of the global behavior of the system. Due to its potential, co-simulation is being studied in many different disciplines but with limited sharing of findings. Our aim with this work is to summarize, bridge, and enhance future research in this multidisciplinary area. We provide an overview of co-simulation approaches, research challenges, and research opportunities, together with a detailed taxonomy with different aspects of the state of the art of co-simulation and classification for the past five years. The main research needs identified are: finding generic approaches for modular, stable and accurate coupling of simulation units; and expressing the adaptations required to ensure that the coupling is correct.

A Survey on Optical Network-on-Chip Architectures

Abstract: Optical on-chip data transmission enabled by silicon photonics (SiP) is widely considered a key technology to overcome the bandwidth and energy limitations of electrical interconnects. The possibility of integrating optical links into the on-chip communication fabric has opened up a fascinating new research field—Optical Networks-on-Chip (ONoCs)—which has been gaining large interest by the community. SiP devices and materials, however, are still evolving, and dealing with optical data transmission on chip makes designers and researchers face a whole new set of obstacles and challenges. Designing efficient ONoCs is a challenging task and requires a detailed knowledge from on-chip traffic demands and patterns down to the physical layout and implications of integrating both electronic and photonic devices. In this paper, we provide an exhaustive review of recently proposed ONoC architectures, discuss their strengths and weaknesses, and outline active research areas. Moreover, we discuss recent research efforts in key enabling technologies, such as on-chip and adaptive laser sources, automatic synthesis tools, and ring heating techniques, which are essential to enable a widespread commercial adoption of ONoCs in the future.

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Abstract: Optical on-chip communication is considered a promising candidate to overcome latency and energy bottlenecks of electrical interconnects. Although recently proposed hybrid Networks-on-chip (NoCs), which implement both electrical and optical links, improve power efficiency, they often fail to combine these two interconnect technologies efficiently and suffer from considerable laser power overheads caused by high-bandwidth optical links. We argue that these overheads can be avoided by inserting a higher quantity of low-bandwidth optical links in a topology, as this yields lower optical loss and in turn laser power. Moreover, when optimally combined with electrical links for short distances, this can be done without trading off latency. We present the effectiveness of this concept with Lego, our hybrid, mesh-based NoC that provides high power efficiency by utilizing electrical links for local traffic, and low-bandwidth optical links for long distances. Electrical links are placed systematically to outweigh the serialization delay introduced by the optical links, simplify router microarchitecture, and allow to save optical resources. Our routing algorithm always chooses the link that offers the lowest latency and energy. Compared to state-of-the-art proposals, Lego increases throughput-per-watt by at least 40%, and lowers latency by 35% on average for synthetic traffic. On SPLASH-2/PARSEC workloads, Lego improves power efficiency by at least 37% (up to 3.5x).

A Review of Recent Research on Heat Transfer in Three-Dimensional Integrated Circuits (3-D ICs)

Abstract: Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few decades, driven in part by the techno-economic difficulties of dimensional scaling and the increasing interconnect delay in microelectronics. In a 3-D IC, vertical integration of multiple transistor planes, either through monolithic integration or through bonding of multiple strata, offers reduced interconnect delay and enhanced design flexibility. However, vertical integration in a 3-D IC also results in severe thermal management challenges. Thermal management of a 3-D IC is exacerbated by the multilayer nature of the 3-D IC. Furthermore, new components such as through-silicon vias (TSVs) offer opportunities for novel thermal management. This article presents a critical review of research literature related to heat transfer in 3-D ICs, focusing specifically on thermal modeling, thermal–electrical codesign, and thermal management of a 3-D IC. Key literature from recent years is categorized and summarized. A discussion on the future outlook for research in these areas is presented. It is expected that this review article will be helpful for researchers in academia and industry for understanding the state-of-the-art in various areas related to heat transfer in 3-D ICs.