Albert E. Ruehli

Bio: Albert E. Ruehli is an academic researcher from Missouri University of Science and Technology. The author has contributed to research in topics: Partial element equivalent circuit & Equivalent circuit. The author has an hindex of 40, co-authored 196 publications receiving 9413 citations. Previous affiliations of Albert E. Ruehli include University of Illinois at Urbana–Champaign & University of Arizona.

The modified nodal approach to network analysis

Abstract: The nodal method has been widely used for formulating circuit equations in computer-aided network analysis and design programs. However, several limitations exist in this method including the inability to process voltage sources and current-dependent circuit elements in a simple and efficient manner. A modified nodal analysis (MNA) method is proposed here which retains the simplicity and other advantages of nodal analysis while removing its limitations. A simple and effective pivoting scheme is also given. Numerical examples are used to compare the MNA method with the tableau method. Favorable results are observed for the MNA method in terms of the dimension, number of nonzeros, and fill-ins for comparable circuit matrices.

Equivalent Circuit Models for Three-Dimensional Multiconductor Systems

Abstract: Multiconductor or multiwire arrangements find many applications in electronic systems. Examples are interconnections between digital circuits or integrated microwave circuits. Equivalent circuit models are derived here from an integral equation to establish an electrical description of the physical geometry. The models, which are appropriately called partial element equivalent circuits (PEEC), are general in that they include losses. Models of different complexity can be constructed, to suit the application at hand.

Inductance calculations in a complex integrated circuit environment

Abstract: This paper describes a method for calculating multiloop inductances formed by complicated interconnection conductors. Knowledge of these inductances leads to useful information concerning the design of such systems. In the approach pursued here, the conductor loops are divided into segments for which so-called partial inductances are calculated. The partial inductancens are then appropriately added to yield the desired loop inductance.

The Waveform Relaxation Method for Time-Domain Analysis of Large Scale Integrated Circuits

Abstract: The Waveform Relaxation (WR) method is an iterative method for analyzing nonlinear dynamical systems in the time domain. The method, at each iteration, decomposes the system into several dynamical subsystems each of which is analyzed for the entire given time interval. Sufficient conditions for convergence of the WR method are proposed and examples in MOS digital integrated circuits are given to show that these conditions are very mild in practice. Theoretical and computational studies show the method to be efficient and reliable.

An Overview of the BlueGene/L Supercomputer

Abstract: This paper gives an overview of the BlueGene/L Supercomputer. This is a jointly funded research partnership between IBM and the Lawrence Livermore National Laboratory as part of the United States Department of Energy ASCI Advanced Architecture Research Program. Application performance and scaling studies have recently been initiated with partners at a number of academic and government institutions, including the San Diego Supercomputer Center and the California Institute of Technology. This massively parallel system of 65,536 nodes is based on a new architecture that exploits system-on-a-chip technology to deliver target peak processing power of 360 teraFLOPS (trillion floating-point operations per second). The machine is scheduled to be operational in the 2004--2005 time frame, at price/performance and power consumption/performance targets unobtainable with conventional architectures.

The future of wires

Abstract: Concern about the performance of wires wires in scaled technologies has led to research exploring other communication methods. This paper examines wire and gate delays as technologies migrate from 0.18-/spl mu/m to 0.035-/spl mu/m feature sizes to better understand the magnitude of the the wiring problem. Wires that shorten in length as technologies scale have delays that either track gate delays or grow slowly relative to gate delays. This result is good news since these "local" wires dominate chip wiring. Despite this scaling of local wire performance, computer-aided design (CAD) tools must still become move sophisticated in dealing with these wires. Under scaling, the total number of wires grows exponentially, so CAD tools will need to handle an ever-growing percentage of all the wires in order to keep designer workloads constant. Global wires present a more serious problem to designers. These are wires that do not scale in length since they communicate signals across the chip. The delay of these wives will remain constant if repeaters are used meaning that relative to gate delays, their delays scale upwards. These increased delays for global communication will drive architectures toward modular designs with explicit global latency mechanisms.

Attack Detection and Identification in Cyber-Physical Systems

Abstract: Cyber-physical systems are ubiquitous in power systems, transportation networks, industrial control processes, and critical infrastructures. These systems need to operate reliably in the face of unforeseen failures and external malicious attacks. In this paper: (i) we propose a mathematical framework for cyber-physical systems, attacks, and monitors; (ii) we characterize fundamental monitoring limitations from system-theoretic and graph-theoretic perspectives; and (ii) we design centralized and distributed attack detection and identification monitors. Finally, we validate our findings through compelling examples.

Efficient linear circuit analysis by Pade approximation via the Lanczos process

Abstract: In this paper, we introduce PVL, an algorithm for computing the Pade approximation of Laplace-domain transfer functions of large linear networks via a Lanczos process. The PVL algorithm has significantly superior numerical stability, while retaining the same efficiency as algorithms that compute the Pade approximation directly through moment matching, such as AWE and its derivatives. As a consequence, it produces more accurate and higher-order approximations, and it renders unnecessary many of the heuristics that AWE and its derivatives had to employ. The algorithm also computes an error bound that permits to identify the true poles and zeros of the original network. We present results of numerical experiments with the PVL algorithm for several large examples. >

Attack Detection and Identification in Cyber-Physical Systems -- Part I: Models and Fundamental Limitations

Abstract: Cyber-physical systems integrate computation, communication, and physical capabilities to interact with the physical world and humans. Besides failures of components, cyber-physical systems are prone to malignant attacks, and specific analysis tools as well as monitoring mechanisms need to be developed to enforce system security and reliability. This paper proposes a unified framework to analyze the resilience of cyber-physical systems against attacks cast by an omniscient adversary. We model cyber-physical systems as linear descriptor systems, and attacks as exogenous unknown inputs. Despite its simplicity, our model captures various real-world cyber-physical systems, and it includes and generalizes many prototypical attacks, including stealth, (dynamic) false-data injection and replay attacks. First, we characterize fundamental limitations of static, dynamic, and active monitors for attack detection and identification. Second, we provide constructive algebraic conditions to cast undetectable and unidentifiable attacks. Third, by using the system interconnection structure, we describe graph-theoretic conditions for the existence of undetectable and unidentifiable attacks. Finally, we validate our findings through some illustrative examples with different cyber-physical systems, such as a municipal water supply network and two electrical power grids.

Equivalent Circuit Models for Three-Dimensional Multiconductor Systems

Abstract: Multiconductor or multiwire arrangements find many applications in electronic systems. Examples are interconnections between digital circuits or integrated microwave circuits. Equivalent circuit models are derived here from an integral equation to establish an electrical description of the physical geometry. The models, which are appropriately called partial element equivalent circuits (PEEC), are general in that they include losses. Models of different complexity can be constructed, to suit the application at hand.