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Alberto Sangiovanni-Vincentelli
Researcher at University of California, Berkeley
Publications - 946
Citations - 47259
Alberto Sangiovanni-Vincentelli is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: Logic synthesis & Finite-state machine. The author has an hindex of 99, co-authored 934 publications receiving 45201 citations. Previous affiliations of Alberto Sangiovanni-Vincentelli include National University of Singapore & Lawrence Berkeley National Laboratory.
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System and method for automatically synthesizing interfaces between incompatible protocols
TL;DR: In this paper, the authors present a system and method for enabling IP blocks to be reused at a system level using regular expression based protocol descriptions to show how to map the message onto a signaling protocol.
Proceedings ArticleDOI
Yield prediction for 3D capacitive interconnections
A. Fazzi,L. Magagni,M. De Dominicis,P. Zoffoli,Roberto Canegallo,P. L. Rolandi,Alberto Sangiovanni-Vincentelli,Roberto Guerrieri +7 more
TL;DR: In this paper, a parametric yield prediction methodology for 3D capacitive links is presented, starting from the analysis of communication circuits and bit error rate (BER) measurements, the authors analyze stacking variability in order to predict reliability and performance.
Proceedings ArticleDOI
Hybrid Systems in Automotive Electronics Design
TL;DR: A broad view of the development process for embedded control systems in the automotive industry is taken with the purpose of identifying challenges and opportunities for hybrids in the design flow.
Journal ArticleDOI
Semantics-Preserving Design of Embedded Control Software from Synchronous Models
TL;DR: This work presents a method for preserving the synchronous semantics through buffer-based intertask communication mechanisms, grounded on an abstraction of the target platform, which allows the designer to deal with any task set and be independent of the implementation.
Proceedings ArticleDOI
Automatic Code Generation for Synchronous Reactive Communication
TL;DR: An automatic code generation framework for the semantics-preserving implementation of communication in multi-rate systems and leverages the Target Language Compiler template language of Real-Time Workshop and extends the applicability of available commercial code generators.