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Alberto Sangiovanni-Vincentelli

Researcher at University of California, Berkeley

Publications -  946
Citations -  47259

Alberto Sangiovanni-Vincentelli is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: Logic synthesis & Finite-state machine. The author has an hindex of 99, co-authored 934 publications receiving 45201 citations. Previous affiliations of Alberto Sangiovanni-Vincentelli include National University of Singapore & Lawrence Berkeley National Laboratory.

Papers
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Book ChapterDOI

Function / Architecture Optimization and Co-Design Flow

TL;DR: This chapter focused on discussing optimization of both control and data and how it was introduced into the co-design process as a crucial player in the analysis and redundancy removal of the information embodied in the function as it is constrained by the application and architecture demands.
Posted Content

Context-Specific Validation of Data-Driven Models.

TL;DR: A context-specific validation framework to quantify the quality of a learned model based on a distance metric between the closed-loop actual system and the learned model and an active sampling scheme to compute a probabilistic upper bound on this distance in a sample-efficient manner is proposed.
Proceedings ArticleDOI

Embedded systems education (panel session) (abstract only)

TL;DR: This panel addresses the challenges associated with the educational issues in embedded systems design and design automation by examining issues in including embedded systems in university curricula, as well as in setting up research programs that are crucial for the education of graduate students.
Proceedings ArticleDOI

Various aspects of the scaling problem in optimization- based computer-aided design

TL;DR: This paper presents a meta-modelling framework for semi-infinite programming, which automates a large number of engineering design problems by automating the very labor-intensive and therefore time-heavy process of programming.
Proceedings ArticleDOI

Functional clock schedule optimization

TL;DR: A novel algorithm is proposed that accounts for false paths (over several time frames) in level-sensitive sequential circuits to obtain tighter bounds on the optimum clock schedule than previously obtainable.