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Alberto Sangiovanni-Vincentelli
Researcher at University of California, Berkeley
Publications - 946
Citations - 47259
Alberto Sangiovanni-Vincentelli is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: Logic synthesis & Finite-state machine. The author has an hindex of 99, co-authored 934 publications receiving 45201 citations. Previous affiliations of Alberto Sangiovanni-Vincentelli include National University of Singapore & Lawrence Berkeley National Laboratory.
Papers
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Book ChapterDOI
Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment
TL;DR: A mathematical framework to deal with the composition of heterogeneous reactive systems is proposed, which allows to establish theorems, from which design techniques can be derived.
An envelope-following method for the efficient transient simulation of switching power and filter circuits
TL;DR: The authors describe the implementation of an envelope-following method that is particularly efficient for switching power and filter circuits, and they present results demonstrating the method's effectiveness.
Proceedings ArticleDOI
CADICS-cyclic analog-to-digital converter synthesis
TL;DR: The program is capable of synthesizing A/D converters which have a broad range of sampling rate, resolution, and silicon area, and performance comparable to a manual approach without using any standard cell libraries.
Proceedings ArticleDOI
Correct-by-Construction Transformations across Design Environments for Model-Based Embedded Software Development
Massimo Baleani,Alberto Ferrari,Leonardo Mangeruca,Alberto Sangiovanni-Vincentelli,Ulrich Freund,E. Schlenker,H.-J. Wolff +6 more
TL;DR: This work proposes to adopt a formal transformation across different tools and gives an example of this approach by linking two tools that are widely used in the automotive domain, Simulink and ASCET, which can be applied to any embedded software design flow to leverage the power of all the tools in the flow.
Proceedings ArticleDOI
Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool
TL;DR: A method of synthesizing low-power combinational logic circuits from Shannon Graphs is proposed such that an n input, m output circuit realization using 2-input gates with unbounded fanout has O(nm) transitions per input vector.