Alexander Richardson

TL;DR: This work presents a new conceptual framework embodied in an LLVM-based tool: the Security-Oriented Analysis of Application Programs (SOAAP) that allows programmers to reason about compartmentalization using source-code annotations (compartmentalization hypotheses).

TL;DR: This document describes the rapidly maturing design for the Capability Hardware Enhanced RISC Instructions (CHERI) Instruction-Set Architecture (ISA), and provides reference documentation for the CHERI instruction-set architecture and potential memory models, along with their requirements.

TL;DR: The cache behavior of an in-memory tag table is characterized and it is demonstrated that an optimized implementation can typically achieve a near-zero memory traffic overhead.

TL;DR: This work describes the first adaptation of a full C-language operating system (FreeBSD) with an enterprise database (PostgreSQL) for complete spatial and referential memory safety and shows that awareness of abstract capabilities, coupled with CHERI architectural capabilities, can provide more complete protection, strong compatibility, and acceptable performance overhead compared with the pre-CHERI baseline and software-only approaches.

TL;DR: It is shown that CHERI capabilities can be used as a foundation to enable low-cost heap temporal safety by facilitating out-of-date pointer revocation, as capabilities enable precise and efficient identification and invalidation of pointers, even when using unsafe languages such as C.