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Alexandra Fedorova

Researcher at University of British Columbia

Publications -  101
Citations -  5517

Alexandra Fedorova is an academic researcher from University of British Columbia. The author has contributed to research in topics: Scheduling (computing) & Multi-core processor. The author has an hindex of 35, co-authored 98 publications receiving 5186 citations. Previous affiliations of Alexandra Fedorova include Oracle Corporation & Business International Corporation.

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Journal ArticleDOI

Addressing shared resource contention in multicore processors via scheduling

TL;DR: This study is the first to provide a comprehensive analysis of contention-mitigating techniques that use only scheduling, and finds a classification scheme that addresses not only contention for cache space, but contention for other shared resources, such as the memory controller, memory bus and prefetching hardware.
Proceedings ArticleDOI

Hybrid transactional memory

TL;DR: Using a simulated multiprocessor with HTM support, the viability of the HyTM approach is demonstrated: it can provide performance and scalability approaching that of an unbounded HTM implementation, without the need to support all transactions with complicatedHTM support.
Proceedings ArticleDOI

Traffic management: a holistic approach to memory placement on NUMA systems

TL;DR: The design of Carrefour is presented, the challenges of implementing it on modern hardware are presented, and insights about hardware support that would help optimize system software on future NUMA systems are drawn.
Proceedings Article

A case for NUMA-aware contention management on multicore systems

TL;DR: The effects on performance imposed by resource contention and remote access latency are quantified and a new contention management algorithm is proposed and evaluated that significantly outperforms a NUMA-unaware algorithm proposed before as well as the default Linux scheduler.
Journal ArticleDOI

HASS: a scheduler for heterogeneous multicore systems

TL;DR: This work proposes a Heterogeneity-Aware Signature-Supported scheduling algorithm that does the matching using per-thread architectural signatures, which are compact summaries of threads' architectural properties collected offline, and is comparatively simple and scalable.