scispace - formally typeset
Search or ask a question
Author

Andrea Padovani

Bio: Andrea Padovani is an academic researcher from Applied Materials. The author has contributed to research in topics: Resistive random-access memory & Dielectric. The author has an hindex of 29, co-authored 141 publications receiving 3657 citations. Previous affiliations of Andrea Padovani include SEMATECH & University of Modena and Reggio Emilia.


Papers
More filters
Journal ArticleDOI
TL;DR: In this paper, the authors identify the root cause for the increase of the remnant polarization during the wake-up phase and subsequent polarization degradation with further cycling of a hafnium oxide-based ferroelectric random access memory (FeRAM).
Abstract: Novel hafnium oxide (HfO2)-based ferroelectrics reveal full scalability and complementary metal oxide semiconductor integratability compared to perovskite-based ferroelectrics that are currently used in nonvolatile ferroelectric random access memories (FeRAMs). Within the lifetime of the device, two main regimes of wake-up and fatigue can be identified. Up to now, the mechanisms behind these two device stages have not been revealed. Thus, the main scope of this study is an identification of the root cause for the increase of the remnant polarization during the wake-up phase and subsequent polarization degradation with further cycling. Combining the comprehensive ferroelectric switching current experiments, Preisach density analysis, and transmission electron microscopy (TEM) study with compact and Technology Computer Aided Design (TCAD) modeling, it has been found out that during the wake-up of the device no new defects are generated but the existing defects redistribute within the device. Furthermore, vacancy diffusion has been identified as the main cause for the phase transformation and consequent increase of the remnant polarization. Utilizing trap density spectroscopy for examining defect evolution with cycling of the device together with modeling of the degradation results in an understanding of the main mechanisms behind the evolution of the ferroelectric response.

548 citations

Journal ArticleDOI
TL;DR: This manuscript describes the most recommendable methodologies for the fabrication, characterization, and simulation of RS devices, as well as the proper methods to display the data obtained.
Abstract: Resistive switching (RS) is an interesting property shown by some materials systems that, especially during the last decade, has gained a lot of interest for the fabrication of electronic devices, with electronic nonvolatile memories being those that have received the most attention. The presence and quality of the RS phenomenon in a materials system can be studied using different prototype cells, performing different experiments, displaying different figures of merit, and developing different computational analyses. Therefore, the real usefulness and impact of the findings presented in each study for the RS technology will be also different. This manuscript describes the most recommendable methodologies for the fabrication, characterization, and simulation of RS devices, as well as the proper methods to display the data obtained. The idea is to help the scientific community to evaluate the real usefulness and impact of an RS study for the development of RS technology. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

441 citations

Journal ArticleDOI
TL;DR: In this paper, the authors combine electrical, physical, and transport/atomistic modeling results to identify critical conductive filament features controlling TiN/HfO2/TiN resistive memory (RRAM) operations.
Abstract: By combining electrical, physical, and transport/atomistic modeling results, this study identifies critical conductive filament (CF) features controlling TiN/HfO2/TiN resistive memory (RRAM) operations. The leakage current through the dielectric is found to be supported by the oxygen vacancies, which tend to segregate at hafnia grain boundaries. We simulate the evolution of a current path during the forming operation employing the multiphonon trap-assisted tunneling (TAT) electron transport model. The forming process is analyzed within the concept of dielectric breakdown, which exhibits much shorter characteristic times than the electroforming process conventionally employed to describe the formation of the conductive filament. The resulting conductive filament is calculated to produce a non-uniform temperature profile along its length during the reset operation, promoting preferential oxidation of the filament tip. A thin dielectric barrier resulting from the CF tip oxidation is found to control filament resistance in the high resistive state. Field-driven dielectric breakdown of this barrier during the set operation restores the filament to its initial low resistive state. These findings point to the critical importance of controlling the filament cross section during forming to achieve low power RRAM cell switching.

430 citations

Journal ArticleDOI
TL;DR: In this paper, the authors investigate the characteristics of the defects responsible for leakage current in the SiO2 and SiO 2/HfO2 gate dielectric stacks in a wide temperature range (6 K-400 K).
Abstract: In this paper, we investigate the characteristics of the defects responsible for the leakage current in the SiO2 and SiO2/HfO2 gate dielectric stacks in a wide temperature range (6 K-400 K). We simulated the temperature dependence of the I -V characteristics both at positive and negative gate voltages by applying the multiphonon trap-assisted tunneling model describing the charge transport through the dielectric. In the depletion/weak inversion regime, the current is limited by the supply of carriers available for tunneling. In strong inversion, the temperature dependence is governed by the charge transport mechanisms through the stacks; in particular, in SiO2/HfO2 dielectric stacks, the coupling of the injected carriers with the dielectric phonons at the trap sites is the dominant mechanism. Matching the simulation results to the measurement data allows extracting important trap parameters, e.g., the trap relaxation and ionization energies, which identify the atomic structure of the electrically active defects in the gate dielectric.

216 citations

Journal ArticleDOI
TL;DR: In this article, a model describing the operations of hafnium oxide-based resistive random access memory (RRAM) devices at the microscopic level is proposed, where charge carrier and ion transport are self-consistently described starting from the leakage current in pristine HfO2 material structural modifications occurring during the RRAM operations, such as conductive filament creation and disruption, are accounted for.
Abstract: We propose a model describing the operations of hafnium oxide-based resistive random access memory (RRAM) devices at the microscopic level Charge carrier and ion transport are self-consistently described starting from the leakage current in pristine HfO2 Material structural modifications occurring during the RRAM operations, such as conductive filament (CF) creation and disruption, are accounted for The model describes the complex processes leading to a formation of the CF and its dependence on both electrical conditions (eg, current compliance, voltage stress, and temperature) and device characteristics (eg, electrodes material and dielectric thickness)

155 citations


Cited by
More filters
01 May 1993
TL;DR: Comparing the results to the fastest reported vectorized Cray Y-MP and C90 algorithm shows that the current generation of parallel machines is competitive with conventional vector supercomputers even for small problems.
Abstract: Three parallel algorithms for classical molecular dynamics are presented. The first assigns each processor a fixed subset of atoms; the second assigns each a fixed subset of inter-atomic forces to compute; the third assigns each a fixed spatial region. The algorithms are suitable for molecular dynamics models which can be difficult to parallelize efficiently—those with short-range forces where the neighbors of each atom change rapidly. They can be implemented on any distributed-memory parallel machine which allows for message-passing of data between independently executing processors. The algorithms are tested on a standard Lennard-Jones benchmark problem for system sizes ranging from 500 to 100,000,000 atoms on several parallel supercomputers--the nCUBE 2, Intel iPSC/860 and Paragon, and Cray T3D. Comparing the results to the fastest reported vectorized Cray Y-MP and C90 algorithm shows that the current generation of parallel machines is competitive with conventional vector supercomputers even for small problems. For large problems, the spatial algorithm achieves parallel efficiencies of 90% and a 1840-node Intel Paragon performs up to 165 faster than a single Cray C9O processor. Trade-offs between the three algorithms and guidelines for adapting them to more complex molecular dynamics simulations are also discussed.

29,323 citations

Journal ArticleDOI
02 May 2012
TL;DR: The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide resistive switching random access memory (RRAM) are discussed, with a focus on the use of RRAM for nonvolatile memory application.
Abstract: In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.

2,295 citations

Journal ArticleDOI
07 May 2015-Nature
TL;DR: The experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification).
Abstract: Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

2,222 citations

Journal ArticleDOI
TL;DR: This work provides an overview of the current understanding of bipolar-switching RRAM operation, reliability and scaling, and the stability of the low- and high-resistance states will be discussed in terms of conductance fluctuations and evolution in 1D filaments containing only a few atoms.
Abstract: With the explosive growth of digital data in the era of the Internet of Things (IoT), fast and scalable memory technologies are being researched for data storage and data-driven computation. Among the emerging memories, resistive switching memory (RRAM) raises strong interest due to its high speed, high density as a result of its simple two-terminal structure, and low cost of fabrication. The scaling projection of RRAM, however, requires a detailed understanding of switching mechanisms and there are potential reliability concerns regarding small device sizes. This work provides an overview of the current understanding of bipolar-switching RRAM operation, reliability and scaling. After reviewing the phenomenological and microscopic descriptions of the switching processes, the stability of the low- and high-resistance states will be discussed in terms of conductance fluctuations and evolution in 1D filaments containing only a few atoms. The scaling potential of RRAM will finally be addressed by reviewing the recent breakthroughs in multilevel operation and 3D architecture, making RRAM a strong competitor among future high-density memory solutions.

653 citations

Journal ArticleDOI
TL;DR: In this paper, the authors identify the root cause for the increase of the remnant polarization during the wake-up phase and subsequent polarization degradation with further cycling of a hafnium oxide-based ferroelectric random access memory (FeRAM).
Abstract: Novel hafnium oxide (HfO2)-based ferroelectrics reveal full scalability and complementary metal oxide semiconductor integratability compared to perovskite-based ferroelectrics that are currently used in nonvolatile ferroelectric random access memories (FeRAMs). Within the lifetime of the device, two main regimes of wake-up and fatigue can be identified. Up to now, the mechanisms behind these two device stages have not been revealed. Thus, the main scope of this study is an identification of the root cause for the increase of the remnant polarization during the wake-up phase and subsequent polarization degradation with further cycling. Combining the comprehensive ferroelectric switching current experiments, Preisach density analysis, and transmission electron microscopy (TEM) study with compact and Technology Computer Aided Design (TCAD) modeling, it has been found out that during the wake-up of the device no new defects are generated but the existing defects redistribute within the device. Furthermore, vacancy diffusion has been identified as the main cause for the phase transformation and consequent increase of the remnant polarization. Utilizing trap density spectroscopy for examining defect evolution with cycling of the device together with modeling of the degradation results in an understanding of the main mechanisms behind the evolution of the ferroelectric response.

548 citations