Andrew J. Bayba

Bio: Andrew J. Bayba is an academic researcher from United States Army Research Laboratory. The author has contributed to research in topics: Thermal resistance & Gallium nitride. The author has an hindex of 8, co-authored 15 publications receiving 349 citations.

Thermal resistance calculation of AlGaN-GaN devices

Abstract: We present an original accurate closed-form expression for the thermal resistance of a multifinger AlGaN-GaN high electron-mobility transistor (HEMT) device on a variety of host substrates including SiC, Si, and sapphire, as well as the case of a single-crystal GaN wafer. The model takes into account the thickness of GaN and host substrate layers, the gate pitch, length, width, and thermal conductivity of GaN, and host substrate. The model's validity is verified by comparing it with experimental observations. In addition, the model compares favorably with the results of numerical simulations for many different devices; very close (1%-2%) agreement is observed. Having an analytical expression for the channel temperature is of great importance for designers of power devices and monolithic microwave integrated circuits. In addition, it facilitates a number of investigations that are not practical or possible using time-consuming numerical simulations. The closed-form expression facilitates the concurrent optimization of electrical and thermal properties using standard computer-aided design tools.

Accurate determination of thermal resistance of FETs

Abstract: The accurate determination of the channel temperature in field-effect transistors (FETs) and monolithic microwave integrated circuits is critical for reliability. An original accurate closed-form expression is presented for the thermal resistance of multifinger FET structures. The model is based on the solution of Laplace's equations in prolate spheroidal coordinates and elliptical cylinder coordinates. The model's validity is verified by comparing the results with finite-element simulations, and experimental observations from liquid-crystal measurements and spatially resolved photoluminescence measurements. Very close agreement is observed in all cases.

Channel Temperature Analysis of GaN HEMTs With Nonlinear Thermal Conductivity

Abstract: This paper presents an enhanced, closed-form expression for the thermal resistance, and thus, the channel temperature of AlGaN/gallium nitride (GaN) HEMTs, including the effect of the temperature-dependent thermal conductivity of GaN and SiC or Si substrates. In addition, the expression accounts for temperature increase across the die-attach. The model’s validity is verified by comparing it with experimental observations. The model results also compare favorably with those from finite-element numerical simulations across the various device geometric and material parameters. The model provides a more accurate channel temperature than that from a constant thermal conductivity assumption; this is particularly significant for GaN/Si HEMTs where the temperature rise is higher than in GaN/SiC. The model is especially useful for device and monolithic microwave integrated circuit designers in the thermal assessment of their device design iterations against required performance for their specific applications.

Utilizing Diode Characteristics for GaN HEMT Channel Temperature Prediction

Abstract: Measuring channel temperature in GaN high-electron mobility transistors (HEMTs) is challenging due to the submicrometer dimensions of the gate fingers. The HEMT characteristics are electrically and thermally dependent. The channel temperature is measured using the Schottky gate-diode forward characteristics and compared with results of simulation, theory, and experimental evidence. The pulsed gate-diode forward resistance and threshold voltage predict channel temperatures that agree well with other methods. The technique presented provides a fast, easily implementable methodology for estimating channel temperature.

Manifold Microchannel Cooler for Direct Backside Liquid Cooling of SiC Power Devices

Abstract: A unique manifold microchannel cooler has been developed based on single phase liquid forced convection flow. It is the first of its kind to directly cool the backside of a device using a manifold microchannel design which minimizes the pressure drop across the channel while allowing the maximum cooling potential and temperature uniformity. This report illustrates the fabrication sequence, packaging procedures and test set-up required to assess the cooler’s functionality. Simulations of heat dissipation and fluid flow in the assembly were conducted using the Floworks® module of Solidworks® modeling software. The cooler has been tested using a SiC diode and initial test results show very low thermal resistivities and low thermal increases of the SiC devices. Increasing power levels and higher packaging densities of today’s microelectronics create a need for improved cooling methods to improve heat transfer from power devices. This cooler is targeted at cooling small, high power SiC devices which are seeing increased use because of their fast switching speed and higher reverse bias breakdown voltage. The manifold design uses larger channels to transport fluid into and out of the cooling region and smaller crossover microchannels that are the active cooling area. This type of design minimizes pressure drop, maximizes heat transfer and allows temperature uniformity across the device area. A 25 mm × 5 mm × 1.5 mm (thick) cooler was fabricated to cool a 4 mm × 4 mm × 0.4 mm (thick) SiC diode. The cooler has been fabricated out of a single 1 mm thick silicon wafer, using deep reactive ion etching (DRIE) to create both the microchannels and the manifold channels. The manifold channels are 200 μm wide with a 250 μm pitch with an 800 μm depth. The microchannels are 20 μm wide with a 40 μm pitch with a 200 μm depth. The dimensions were chosen based on initial modeling results to maximize the ratio of the cross sectional area of the manifold to the microchannels while staying within fabrication limitations. The SiC diode is bonded directly onto the cooler using a gold tin eutectic bond. A 1.6 mm outer diameter stainless steel capillary tube is used to flow the liquid coolant into the manifold channels and is sealed with an epoxy. Experimental results show excellent thermal results with thermal resistances less than 0.1 K/(W/cm2 ), heat fluxes over 600 W/cm2 , and small increases in device temperature. All these results come from a cooler which has a volume less than 200 mm3 . The cooler design has been shown to be very durable and has a very tight fluidic seal with no leaks throughout the experimentation. It was fabricated using standard MEMS techniques and can be easily repeated. Simulations have been correlated with experimental data for a variety of pressure drops. Simulations have also shown the cooler to be capable of keeping the device under 125 C and the water temperature under 100 C (boiling) for a heat flux of 2500 W/cm2 .

Energy dissipation and transport in nanoscale devices

Abstract: Understanding energy dissipation and transport in nanoscale structures is of great importance for the design of energy-efficient circuits and energy-conversion systems. This is also a rich domain for fundamental discoveries at the intersection of electron, lattice (phonon), and optical (photon) interactions. This review presents recent progress in understanding and manipulation of energy dissipation and transport in nanoscale solid-state structures. First, the landscape of power usage from nanoscale transistors (∼10−8 W) to massive data centers (∼109 W) is surveyed. Then, focus is given to energy dissipation in nanoscale circuits, silicon transistors, carbon nanostructures, and semiconductor nanowires. Concepts of steady-state and transient thermal transport are also reviewed in the context of nanoscale devices with sub-nanosecond switching times. Finally, recent directions regarding energy transport are reviewed, including electrical and thermal conductivity of nanostructures, thermal rectification, and the role of ubiquitous material interfaces. Open image in new window

A Review of GaN on SiC High Electron-Mobility Power Transistors and MMICs

Abstract: Gallium-nitride power transistor (GaN HEMT) and integrated circuit technologies have matured dramatically over the last few years, and many hundreds of thousands of devices have been manufactured and fielded in applications ranging from pulsed radars and counter-IED jammers to CATV modules and fourth-generation infrastructure base-stations. GaN HEMT devices, exhibiting high power densities coupled with high breakdown voltages, have opened up the possibilities for highly efficient power amplifiers (PAs) exploiting the principles of waveform engineered designs. This paper summarizes the unique advantages of GaN HEMTs compared to other power transistor technologies, with examples of where such features have been exploited. Since RF power densities of GaN HEMTs are many times higher than other technologies, much attention has also been given to thermal management-examples of both commercial “off-the-shelf” packaging as well as custom heat-sinks are described. The very desirable feature of having accurate large-signal models for both discrete transistors and monolithic microwave integrated circuit foundry are emphasized with a number of circuit design examples. GaN HEMT technology has been a major enabler for both very broadband high-PAs and very high-efficiency designs. This paper describes examples of broadband amplifiers, as well as several of the main areas of high-efficiency amplifier design-notably Class-D, Class-E, Class-F, and Class-J approaches, Doherty PAs, envelope-tracking techniques, and Chireix outphasing.

Energy Dissipation and Transport in Nanoscale Devices

Abstract: Understanding energy dissipation and transport in nanoscale structures is of great importance for the design of energy-efficient circuits and energy-conversion systems. This is also a rich domain for fundamental discoveries at the intersection of electron, lattice (phonon), and optical (photon) interactions. This review presents recent progress in understanding and manipulation of energy dissipation and transport in nanoscale solid-state structures. First, the landscape of power usage from nanoscale transistors (~10^-8 W) to massive data centers (~10^9 W) is surveyed. Then, focus is given to energy dissipation in nanoscale circuits, silicon transistors, carbon nanostructures, and semiconductor nanowires. Concepts of steady-state and transient thermal transport are also reviewed in the context of nanoscale devices with sub-nanosecond switching times. Finally, recent directions regarding energy transport are reviewed, including electrical and thermal conductivity of nanostructures, thermal rectification, and the role of ubiquitous material interfaces.

A Current-Transient Methodology for Trap Analysis for GaN High Electron Mobility Transistors

Abstract: Trapping is one of the most deleterious effects that limit performance and reliability in GaN HEMTs. In this paper, we present a methodology to study trapping characteristics in GaN HEMTs that is based on current-transient measurements. Its uniqueness is that it is amenable to integration with electrical stress experiments in long-term reliability studies. We present the details of the measurement and analysis procedures. With this method, we have investigated the trapping and detrapping dynamics of GaN HEMTs. In particular, we examined layer location, energy level, and trapping/detrapping time constants of dominant traps. We have identified several traps inside the AlGaN barrier layer or at the surface close to the gate edge and in the GaN buffer.

Co-designing electronics with microfluidics for more sustainable cooling.

Abstract: Thermal management is one of the main challenges for the future of electronics1–5. With the ever-increasing rate of data generation and communication, as well as the constant push to reduce the size and costs of industrial converter systems, the power density of electronics has risen6. Consequently, cooling, with its enormous energy and water consumption, has an increasingly large environmental impact7,8, and new technologies are needed to extract the heat in a more sustainable way—that is, requiring less water and energy9. Embedding liquid cooling directly inside the chip is a promising approach for more efficient thermal management5,10,11. However, even in state-of-the-art approaches, the electronics and cooling are treated separately, leaving the full energy-saving potential of embedded cooling untapped. Here we show that by co-designing microfluidics and electronics within the same semiconductor substrate we can produce a monolithically integrated manifold microchannel cooling structure with efficiency beyond what is currently available. Our results show that heat fluxes exceeding 1.7 kilowatts per square centimetre can be extracted using only 0.57 watts per square centimetre of pumping power. We observed an unprecedented coefficient of performance (exceeding 10,000) for single-phase water-cooling of heat fluxes exceeding 1 kilowatt per square centimetre, corresponding to a 50-fold increase compared to straight microchannels, as well as a very high average Nusselt number of 16. The proposed cooling technology should enable further miniaturization of electronics, potentially extending Moore’s law and greatly reducing the energy consumption in cooling of electronics. Furthermore, by removing the need for large external heat sinks, this approach should enable the realization of very compact power converters integrated on a single chip. Cooling efficiency is greatly increased by directly embedding liquid cooling into electronic chips, using microfluidics-based heat sinks that are designed in conjunction with the electronics within the same semiconductor substrate.