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Aniruddha Ghosal

Bio: Aniruddha Ghosal is an academic researcher from University of Calcutta. The author has contributed to research in topics: Electron mobility & Scattering. The author has an hindex of 7, co-authored 42 publications receiving 161 citations.

Papers
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Book ChapterDOI
13 Feb 2021
TL;DR: In this article, the authors analyzed and numerically solved 2D Poisson's equation for the optimization of low power device performance parameters by changing the channel length from 20 to 30 nm and gate oxide thickness from 2 to 5 nm, respectively.
Abstract: Modeling and design are carried out of an n-type dual material double gate Tunnel Field Effect Transistor (DMDGTFET) using Ge as a channel material for optimization of the low power device performance parameters like subthershold swing, total gate delay, power dissipation and (On–Off) current ratio, respectively. The energy band diagram, surface potential, and electric field are obtained for on state and off state of the device by the solution of 2D Poisson’s equation utilizing indigenously developed software. The results show that both on current, and (On–Off) current ratio are higher in TFET with Ge than Si as a channel material. In this paper, authors analytically and numerically solved 2D Poisson’s equation for the optimization of low power device performance parameters by changing the channel length from 20 to 30 nm and gate oxide thickness from 2 to 5 nm, respectively. The device performance parameters such as subthershold swing, (On–Off) current ratio, total gate delay, and power dissipation are found 15 mV/decade, 2.190 × 106, 7.8 ps and 2.44 fW at channel length 20 nm and gate oxide thickness 2 nm, respectively. Thus, dual material double gate germanium-based TFETs are promising next generation devices for ultra large scale integration as well as low power digital system.

1 citations

Journal ArticleDOI
TL;DR: In this paper, the authors have considered the Al14N15N with different ratio of 14N and 15N for the analysis owing to considerable interest in superlattice structures of large band gap semiconductors having various favorable material properties such as very high thermal conductivity, high carrier mobility and wide bandwidth operation.

1 citations

Journal ArticleDOI
TL;DR: In this paper, the authors presented several transport properties of InAlN/AlN superlattice MOSFET by considering 14N and 15N isotopes and investigated the carrier mobility and drain current.
01 Jan 2011
TL;DR: In this article, the variations of the drain current with drain voltage (Vd) for one-dimensional 10nm GaN nanowire (NW) FET at different temperatures, namely, 20K, 50K and 77K, were studied.
Abstract: We have studied the variations of the drain current (Id) with drain voltage (Vd) for one – dimensional 10nm GaN nanowire (NW) FET at different temperatures, namely, 20K, 50K and 77K respectively. The electron distribution function is assumed to be displaced Maxwellian in our model. Momentum and energy balance equations are solved to obtain the current – voltage characteristics. Interactions of the electrons with deformation potential acoustic and polar optic phonons are taken into account. It has been found that Id is higher at low temperature, compared to that at high temperatures which agrees with the experimental worker. We have also studied electron mobility variation with temperature. Mobility decreases with temperature as usual due to the dominance of the polar optic scattering at higher temperature.

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Journal ArticleDOI
TL;DR: A comprehensive review of the continuing efforts in exploring semiconductor nanowires for the assembly of functional nanoscale electronics and macroelectronics, including a unique design of solution-processable nanowire thin-film transistors for high-performance large-area flexible electronics.
Abstract: Semiconductor nanowires have attracted extensive interest as one of the best-defined classes of nanoscale building blocks for the bottom-up assembly of functional electronic and optoelectronic devices over the past two decades. The article provides a comprehensive review of the continuing efforts in exploring semiconductor nanowires for the assembly of functional nanoscale electronics and macroelectronics. Specifically, we start with a brief overview of the synthetic control of various semiconductor nanowires and nanowire heterostructures with precisely controlled physical dimension, chemical composition, heterostructure interface, and electronic properties to define the material foundation for nanowire electronics. We then summarize a series of assembly strategies developed for creating well-ordered nanowire arrays with controlled spatial position, orientation, and density, which are essential for constructing increasingly complex electronic devices and circuits from synthetic semiconductor nanowires. Next, we review the fundamental electronic properties and various single nanowire transistor concepts. Combining the designable electronic properties and controllable assembly approaches, we then discuss a series of nanoscale devices and integrated circuits assembled from nanowire building blocks, as well as a unique design of solution-processable nanowire thin-film transistors for high-performance large-area flexible electronics. Last, we conclude with a brief perspective on the standing challenges and future opportunities.

189 citations

Journal ArticleDOI
J.H. Neave1, P.J. Dobson1, J.J. Harris1, Philip Dawson1, B.A. Joyce1 
TL;DR: In this article, two concentration ranges of silicon doping in MBE-grown GaAs films have been investigated in some detail, and the maximum free-electron concentration of ≈7×1018 cm−3 has been obtained, which is only rather weakly dependent on growth conditions and the nature of the arsenic species.
Abstract: Two concentration ranges of silicon doping in MBE-grown GaAs films have been investigated in some detail. In lightly doped films, with a free-electron concentration of ≈1016cm−3, low-temperature photoluminescence spectra have been analysed to develop a model to account for spectral features previously attributed to Ge and Si acceptor levels. In heavily doped films, a maximum free-electron concentration of ≈7×1018 cm−3 has been obtained, which is only rather weakly dependent on growth conditions and the nature of the arsenic species (As2 or As4). Transmission electron microscopy has shown that no significant precipitation effects occur when higher Si fluxes are used but there is evidence for autocompensation. The maximum PL intensity (300 K) is found at a lower free electron concentration then with Sn-doped films, and is more sharply peaked, but there is no evidence for an anomalous Moss-Burstein shift.

75 citations