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Anne Kaszynski

Publications -  7
Citations -  29

Anne Kaszynski is an academic researcher. The author has contributed to research in topics: Transmission (telecommunications) & Synchronization (computer science). The author has an hindex of 2, co-authored 7 publications receiving 29 citations.

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Patent

Interconnection process and interface using parallelized high-speed serial links

TL;DR: In this paper, a process and interface for interconnection of multiprocessor modules by point-to-point serial-toparallel links is presented, which performs an analog synchronization of the basic clocks of the modules to a reference clock generated by one of the reference modules designated as a reference module, the other modules being called slave modules, and a digital synchronization of each slave module to the start-of-frame sent by the master module.
Patent

Stand alone routing switch and videoconferencing system using the stand alone routing switch

TL;DR: In this paper, a group switching center for data communications and teleprocessing is provided, which comprises first routing switches having a plurality of sending ports ( 51, 53, 55, 57, 56, 57 ) and a plurality receiving ports ( 50, 52, 54, 56, 56 ), each sending port adapted to be operatively connected to a receiving data terminal equipment unit (10, 28, 29 ) or to a sending port of second routing switch ( 32, 34 ), each receiving port adapted with a sending data terminal unit ( 10, 28 and 29 ), and each receiving ports
Patent

Autonomous routing changeover device and video conference system using the same changeover device

TL;DR: In this article, a changeover device that is extremely advantageous for such a high speed link as required in a video conference system is proposed for high-speed link in video conferencing.
Patent

Self-routing switch and videoconference system using such a switch

TL;DR: In this paper, the authors proposed the use of path switches with several transmitter ports and several receiver ports, where each receiver is connected to digital word processing terminal equipment (10,29).
Patent

Procede et interface d'interconnection mettant en oeuvre des liaisons serie haut-debit

TL;DR: In this article, a synchronisation of horloges of base modules is proposed, which synchronises the debut of trames of a module in a module esclave and emises emises par a module maitre.