Retinopathy of prematurity

https://calhoun.nps.edu/bitstream/10945/24839/1/singlesidebandtr00elli.pdf

Single sideband transmission by envelope elimination and restoration.

Molecular Genetics and Neurologic Disease: An Introduction Chromosome Disorders Prions Mitochondrial Disorders Peroxisomal Disorders Lysosomal Disorders Degenerative Disorders Multiple Sclerosis Neuro-oncology Ion Channel Disorders The Genetic Epilepsies Neuropathies and Neuronopathies Muscle Disorders The Phakomatoses: Disorders of Skin and Brain Lipoprotein Disorders Carbohydrate Disorders Amino Acid Disorders Purines The Porphyrias Metal Metabolism Vitamins The Genetics of Bipolar Disorder and Schizophrenia Gene Therapy and the Human Genome

Clinical companion to the Molecular and genetic basis of neurological disease

Sensors based on the detection of small resistance variations are universally recognized as piezoresistive. Being one of the simplest, most common and most investigated classes of sensors, continuous efforts are focused on creating improved devices with higher performance that can be used in many commercial and non–commercial applications (e.g. evaluation of strain, pressure, acceleration, force etc.). Consequently, despite the fact that more than 150 years have passed since the discovery of the piezoresistive effect in some classes of metals and semiconductors, the development of such sensors remains interesting and topical. Moreover, with the advent of second–generation robotics, research on piezoresistive sensors has undergone a massive increase. This paper aims to be a short, self–consistent vademecum which would be useful to researchers and engineers, since it focuses on the fundamentals of theory, materials, and readout–circuit design pertinent to the most recent developments in the field of piezoresistive sensors.

Theory, technology and applications of piezoresistive sensors: A review

Clinical features and metabolic and autoimmune derangements in acquired partial lipodystrophy: report of 35 cases and review of the literature.

A single-stage stacked field-effect transistor (FET) linear power amplifier (PA) is demonstrated using 0.28-?m 2.5-V standard I/O FETs in a 0.13-?m silicon-on-insulator (SOI) CMOS technology. To overcome the low breakdown voltage limit of MOSFETs, a stacked-FET structure is employed, where four transistors are connected in series so that their output voltage swings are added in phase. With a 6.5-V supply, the measured PA achieves a small-signal gain of 14.6 dB, a saturated output power of 32.4 dBm, and a maximum power-added efficiency (PAE) of 47% at 1.9 GHz. Using a reverse-link IS-95 code division multiple access modulated signal, the PA shows an average output power of up to 28.7 dBm with a PAE of 41.2% while meeting the adjacent channel power ratio requirement. Using an uplink wideband code division multiple access modulated signal, the PA shows an average output power of up to 29.4 dBm with a PAE of 41.4% while meeting the adjacent channel leakage ratio requirement. The stacked-FET PA is designed to withstand up to 9 V of supply voltage before reaching its breakdown limit. This is the first reported stacked-FET linear PA in submicrometer SOI CMOS technology that delivers watt-level output power in the gigahertz frequency range with efficiency and linearity performance comparable to those of GaAs-based PAs.

A Watt-Level Stacked-FET Linear Power Amplifier in Silicon-on-Insulator CMOS

A digitally modulated power amplifier (DPA) in 1.2 V 0.13 mum SOI CMOS is presented, to be used as a building block in multi-standard, multi-band polar transmitters. It performs direct amplitude modulation of an input RF carrier by digitally controlling an array of 127 unary-weighted and three binary-weighted elementary gain cells. The DPA is based on a novel two-stage topology, which allows seamless operation from 800 MHz through 2 GHz, with a full-power efficiency larger than 40% and a 25.2 dBm maximum envelope power. Adaptive digital predistortion is exploited for DPA linearization. The circuit is thus able to reconstruct 21.7 dBm WCDMA/EDGE signals at 1.9 GHz with 38% efficiency and a higher than 10 dB margin on all spectral specifications. As a result of the digital modulation technique, a higher than 20.1 % efficiency is guaranteed for WCDMA signals with a peak-to-average power ratio as high as 10.8 dB. Furthermore, a 15.3 dBm, 5 MHz WiMAX OFDM signal is successfully reconstructed with a 22% efficiency and 1.53% rms EVM. A high 10-bit nominal resolution enables a wide-range TX power control strategy to be implemented, which greatly minimizes the quiescent consumption down to 10 mW. A 16.4% CDMA average efficiency is thus obtained across a > 70 dB power control range, while complying with all the spectral specifications.

A 25 dBm Digitally Modulated CMOS Power Amplifier for WCDMA/EDGE/OFDM With Adaptive Digital Predistortion and Efficient Power Control

Smart homes/offices based on wireless sensor networks (WSNs) can provide an assisted living and working environment to the users. In these applications, the distributed network nodes are made up of low-power low-cost high-energy-efficient electronic platforms equipped with sensors, microcontroller, radio, and antenna, able to periodically sense, receive, store, pre-process, and transmit ambient data to a remote host station. Conventional nodes are usually supplied by batteries, resulting in a significant limitation to the lifetime and to the maximum number of deployable devices. To meet the demand of the next Internet-of-Things (IoT) applications, requiring a vast plurality of interconnected wireless network nodes, this paper presents the design and implementation of a WSN platform whose nodes are energetically autonomous thanks to an embedded photovoltaic panel associated to a rechargeable battery and a power-efficient design with optimized power-management strategy. The implemented node is able to harvest indoor ambient light starting from 100 lux and, according to the available energy, adaptively sets the sensors acquisition and RF transmission rate. Moreover, it provides long-distance data transmission with air data rate from 1 to 500 kbps. The WSN node device is implemented on an $8.6\times 5.4$ cm2 flexible PCB, being therefore amenable to conform even to curved surfaces. Comparison with the commercial IoT nodes reveals a significant improvement in the state of the art.

Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation

A protection method may prevent a load-mismatch-induced failure in solid-state power amplifiers In an RF power amplifier, the load voltage standing-wave ratio results in very high voltage peaks at the collector of the final stage and may eventually lead to permanent failure of the power transistor due to avalanche breakdown The method avoids breakdown by attenuating the input power to the final stage during overvoltage conditions, thus limiting the output collector swing This is accomplished by a feedback control system, which detects the peak voltage at the output collector node and clamps its value to a given threshold by varying the circuit gain Indeed, the control loop is unlocked in the nominal condition and it acts when an output mismatching condition is detected A control circuit also allows a supply-independent collector-clamping threshold to be accurately set

Protection of output stage transistor of an RF power amplifier

The analysis and modeling of monolithic stacked transformers fabricated in a high-speed silicon bipolar technology is addressed. On-wafer experimental measurements are employed to investigate the effect of layout scaling on transformer performance parameters (i.e., self-resonance frequency, magnetic coupling coefficient, and insertion loss). Based on this analysis, a wideband lumped model is developed, whose parameters are related to layout and technological data through closed-form expressions. Model accuracy is demonstrated by comparing simulated and measured S-parameters, coil inductance, magnetic coupling coefficient, and maximum available gain of several transformers with scaled layout geometry. The self-resonance frequency is also employed as a figure-of-merit to demonstrate model accuracy at very high frequency.

Antonino Scuderi

Papers

A Watt-Level Stacked-FET Linear Power Amplifier in Silicon-on-Insulator CMOS

A 25 dBm Digitally Modulated CMOS Power Amplifier for WCDMA/EDGE/OFDM With Adaptive Digital Predistortion and Efficient Power Control

Autonomous Energy-Efficient Wireless Sensor Network Platform for Home/Office Automation

Protection of output stage transistor of an RF power amplifier

Analysis and modeling of layout scaling in silicon integrated stacked transformers