scispace - formally typeset
A

Anupam Dutta

Researcher at GlobalFoundries

Publications -  6
Citations -  44

Anupam Dutta is an academic researcher from GlobalFoundries. The author has contributed to research in topics: Cascode & Common gate. The author has an hindex of 2, co-authored 6 publications receiving 33 citations. Previous affiliations of Anupam Dutta include IBM.

Papers
More filters
Journal ArticleDOI

A high precision SOI MEMS–CMOS ±4g piezoresistive accelerometer

TL;DR: In this article, a low noise low offset SOI MEMS-CMOS integrated multi-chip ±4g accelerometer sensor comprising a coupled multi-bandwidth variable-gain amplifier block and a thermal sensitivity and offset compensation block is presented.
Proceedings ArticleDOI

BSIM6 -- Benchmarking the Next-Generation MOSFET Model for RF Applications

TL;DR: The model is found to correlate very well with hardware data and passes all important model quality benchmark tests for analog/RF applications and is a very desirable candidate for future nano-MOSFET simulations.
Proceedings ArticleDOI

Modeling of Body-Bias Dependence of Overlap Capacitances in Bulk MOSFETs

TL;DR: A subcircuit approach to help maintain reciprocity while including body-bias dependence in overlap charges is proposed, which is generic, and works for any device.
Proceedings ArticleDOI

A 6 GHz 0.92 dB NF Cascode LNA in 180 nm SOI CMOS Technology

TL;DR: In this article, an inductively degenerated cascode topology is used for the low-noise amplifier (LNA) with very low noise-figure (NF) of 092 dB.
Proceedings ArticleDOI

A 6.25 mW, +21 dBm OIP3, 0.85 dB NF, 2.5 GHz LNA Employing High Self Gain Device in $0.13 \mu \mathrm{m}$ SOI Technology

TL;DR: In this article, a new high self gain (HSG) common gate (CG) transistor was used to make the output conductance of cascode LNA lower and flatter with drain bias.