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Asier Matallana
Researcher at University of the Basque Country
Publications - 10
Citations - 213
Asier Matallana is an academic researcher from University of the Basque Country. The author has contributed to research in topics: Power module & Voltage. The author has an hindex of 5, co-authored 9 publications receiving 106 citations.
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Journal ArticleDOI
Power module electronics in HEV/EV applications: New trends in wide-bandgap semiconductor technologies and design aspects
TL;DR: This work focuses on an in-deep review of the state of the art concerning the power module, identifying the electrical requirements for the modules and the power conversion topologies that will best suit future drives.
Journal ArticleDOI
Next generation electric drives for HEV/EV propulsion systems: Technology, trends and challenges
TL;DR: In this paper, a comprehensive review of the current technologies, future trends and enabling technologies that will make possible next generation hybrid and full electric vehicle (HEV/EV) drive systems is presented.
Journal ArticleDOI
A methodology to determine reliability issues in automotive SiC power modules combining 1D and 3D thermal simulations under driving cycle profiles
TL;DR: A simulation methodology that combines real-time simulation for electro-thermal characterization of the whole EV propulsion system, using a 1D equivalent thermal impedance circuit, in conjunction with 3D FEM thermal simulation to simplify and speed up the early design stages while maintaining high accuracy in the results.
Proceedings ArticleDOI
Fault injection system for SEU emulation in Zynq SoCs
TL;DR: A fault injection method for SEU (Single Event Upset) emulation in FPGAs based on loading at the programmable logic a configuration file with an erroneous bit is presented, making the injection system independent to the programmatic logic and avoiding the previously mentioned effect.
Journal ArticleDOI
Wide-Bandgap Semiconductor HF-Oscillation Attenuation Method With Tuned Gate $RLC$ Filter
TL;DR: In this article, a simple methodology for attenuation of the negative effects of widebandgap transistor high-frequency oscillations without increasing rise and fall times is presented, based on determination of the source of feedback resonant frequency between gate and power loops using network analyzer measurement on printed circuit board and utilization of a tuned $RLC$ filter.