Attilio Belmonte

Bio: Attilio Belmonte is an academic researcher from Katholieke Universiteit Leuven. The author has contributed to research in topics: Programmable metallization cell & Protein filament. The author has an hindex of 21, co-authored 65 publications receiving 1641 citations. Previous affiliations of Attilio Belmonte include IMEC.

Recommended Methods to Study Resistive Switching Devices

Abstract: Resistive switching (RS) is an interesting property shown by some materials systems that, especially during the last decade, has gained a lot of interest for the fabrication of electronic devices, with electronic nonvolatile memories being those that have received the most attention. The presence and quality of the RS phenomenon in a materials system can be studied using different prototype cells, performing different experiments, displaying different figures of merit, and developing different computational analyses. Therefore, the real usefulness and impact of the findings presented in each study for the RS technology will be also different. This manuscript describes the most recommendable methodologies for the fabrication, characterization, and simulation of RS devices, as well as the proper methods to display the data obtained. The idea is to help the scientific community to evaluate the real usefulness and impact of an RS study for the development of RS technology. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

Three-dimensional observation of the conductive filament in nanoscaled resistive memory devices.

Abstract: The basic unit of information in filamentary-based resistive switching memories is physically stored in a conductive filament. Therefore, the overall performance of the device is indissolubly related to the properties of such filament. In this Letter, we report for the first time on the three-dimensional (3D) observation of the shape of the conductive filament. The observation of the filament is done in a nanoscale conductive-bridging device, which is programmed under real operative conditions. To obtain the 3D-information we developed a dedicated tomography technique based on conductive atomic force microscopy. The shape and size of the conductive filament are obtained in three-dimensions with nanometric resolution. The observed filament presents a conical shape with the narrow part close to the inert-electrode. On the basis of this shape, we conclude that the dynamic filament-growth is limited by the cation transport. In addition, we demonstrate the role of the programming current, which clearly influen...

Intrinsic switching variability in HfO 2 RRAM

Abstract: In this work, we present a systematic electrical characterization of TiN\HfO2\Hf\TiN RRAM elements from the variability perspective. Variability of both programmed resistance values and switching triggering voltages has been evaluated on small scaled cells in a wide operating current range (2μA till 500μA's), for different oxide stacks, in DC and pulsed conditions. For the first time device-to-device and cycle-to-cycle variability are thoroughly compared as well as the impact of different oxygen vacancy profiles. Increase of variability in low current operation is also elucidated.

Improvement of data retention in HfO 2 /Hf 1T1R RRAM cell under low operating current

Abstract: One of the key concerns related to low operating current ( 2 /Hf 1T1R RRAM cells. Based on this understanding we demonstrated significant improvement in retention by adding an additional thermal budget into our process flow. The impact of the Forming process on retention property was also investigated and Forming/SET conditions were optimized to improve the retention without increasing the operation current.

Recent progress in resistive random access memories: Materials, switching mechanisms, and performance

Abstract: This review article attempts to provide a comprehensive review of the recent progress in the so-called resistive random access memories (RRAMs) First, a brief introduction is presented to describe the construction and development of RRAMs, their potential for broad applications in the fields of nonvolatile memory, unconventional computing and logic devices, and the focus of research concerning RRAMs over the past decade Second, both inorganic and organic materials used in RRAMs are summarized, and their respective advantages and shortcomings are discussed Third, the important switching mechanisms are discussed in depth and are classified into ion migration, charge trapping/de-trapping, thermochemical reaction, exclusive mechanisms in inorganics, and exclusive mechanisms in organics Fourth, attention is given to the application of RRAMs for data storage, including their current performance, methods for performance enhancement, sneak-path issue and possible solutions, and demonstrations of 2-D and 3-D crossbar arrays Fifth, prospective applications of RRAMs in unconventional computing, as well as logic devices and multi-functionalization of RRAMs, are comprehensively summarized and thoroughly discussed The present review article ends with a short discussion concerning the challenges and future prospects of the RRAMs

Towards spike-based machine intelligence with neuromorphic computing.

Abstract: Guided by brain-like ‘spiking’ computational frameworks, neuromorphic computing—brain-inspired computing for machine intelligence—promises to realize artificial intelligence while reducing the energy requirements of computing platforms. This interdisciplinary field began with the implementation of silicon circuits for biological neural routines, but has evolved to encompass the hardware implementation of algorithms with spike-based encoding and event-driven representations. Here we provide an overview of the developments in neuromorphic computing for both algorithms and hardware and highlight the fundamentals of learning and hardware frameworks. We discuss the main challenges and the future prospects of neuromorphic computing, with emphasis on algorithm–hardware codesign. The authors review the advantages and future prospects of neuromorphic computing, a multidisciplinary engineering concept for energy-efficient artificial intelligence with brain-inspired functionality.

Resistive switching memories based on metal oxides: mechanisms, reliability and scaling

Abstract: With the explosive growth of digital data in the era of the Internet of Things (IoT), fast and scalable memory technologies are being researched for data storage and data-driven computation. Among the emerging memories, resistive switching memory (RRAM) raises strong interest due to its high speed, high density as a result of its simple two-terminal structure, and low cost of fabrication. The scaling projection of RRAM, however, requires a detailed understanding of switching mechanisms and there are potential reliability concerns regarding small device sizes. This work provides an overview of the current understanding of bipolar-switching RRAM operation, reliability and scaling. After reviewing the phenomenological and microscopic descriptions of the switching processes, the stability of the low- and high-resistance states will be discussed in terms of conductance fluctuations and evolution in 1D filaments containing only a few atoms. The scaling potential of RRAM will finally be addressed by reviewing the recent breakthroughs in multilevel operation and 3D architecture, making RRAM a strong competitor among future high-density memory solutions.

SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices.

Abstract: von Neumann architecture based computers isolate computation and storage (i.e. data is shuttled between computation blocks (processor) and memory blocks). The to-and-fro movement of data leads to a fundamental limitation of modern computers, known as the Memory wall. Logic in-Memory (LIM)/In-Memory Computing (IMC) approaches aim to address this bottleneck by directly computing inside memory units thereby eliminating energy-intensive and time-consuming data movement. Several recent works in literature, propose realization of logic function(s) directly using arrays of emerging resistive memory devices (example- memristors, RRAM/ReRAM, PCM, CBRAM, OxRAM, STT-MRAM etc.), rather than using conventional transistors for computing. The logic/embedded-side of digital systems (like processors, micro-controllers) can greatly benefit from such LIM realizations. However, the pure storage-side of digital systems (example SSDs, enterprise storage etc.) will not benefit much from such LIM approaches as when memory arrays are used for logic they lose their core functionality of storage. Thus, there is the need for an approach complementary to existing LIM techniques, that's more beneficial for the storage-side of digital systems; one that gives compute capability to memory arrays not at the cost of their existing stored states. Fundamentally, this would require memory nanodevice arrays that are capable of storing and computing simultaneously. In this paper, we propose a novel 'Simultaneous Logic in-Memory' (SLIM) methodology which is complementary to existing LIM approaches in literature. Through extensive experiments we demonstrate novel SLIM bitcells (1T-1R/2T-1R) comprising non-filamentary bilayer analog OxRAM devices with NMOS transistors. Proposed bitcells are capable of implementing both Memory and Logic operations simultaneously. Detailed programming scheme, array level implementation, and controller architecture are also proposed. Furthermore, to study the impact of proposed SLIM approach for real-world implementations, we performed analysis for two applications: (i) Sobel Edge Detection, and (ii) Binary Neural Network- Multi layer Perceptron (BNN-MLP). By performing all computations in SLIM bitcell array, huge Energy Delay Product (EDP) savings of ≈75× for 1T-1R (≈40× for 2T-1R) SLIM bitcell were observed for edge-detection application while EDP savings of ≈3.5× for 1T-1R (≈1.6× for 2T-1R) SLIM bitcell were observed for BNN-MLP application respectively, in comparison to conventional computing. EDP savings owing to reduction in data transfer between CPU ↔ memory is observed to be ≈780× (for both SLIM bitcells).

Conduction Mechanism of Valence Change Resistive Switching Memory: A Survey

Abstract: Resistive switching effect in transition metal oxide (TMO) based material is often associated with the valence change mechanism (VCM). Typical modeling of valence change resistive switching memory consists of three closely related phenomena, i.e., conductive filament (CF) geometry evolution, conduction mechanism and temperature dynamic evolution. It is widely agreed that the electrochemical reduction-oxidation (redox) process and oxygen vacancies migration plays an essential role in the CF forming and rupture process. However, the conduction mechanism of resistive switching memory varies considerably depending on the material used in the dielectric layer and selection of electrodes. Among the popular observations are the Poole-Frenkel emission, Schottky emission, space-charge-limited conduction (SCLC), trap-assisted tunneling (TAT) and hopping conduction. In this article, we will conduct a survey on several published valence change resistive switching memories with a particular interest in the I-V characteristic and the corresponding conduction mechanism.