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Avireni Srinivasulu

Bio: Avireni Srinivasulu is an academic researcher from JECRC University. The author has contributed to research in topics: Resistor & CMOS. The author has an hindex of 13, co-authored 97 publications receiving 626 citations. Previous affiliations of Avireni Srinivasulu include Vignan University & Birla Institute of Technology, Mesra.


Papers
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Journal ArticleDOI
TL;DR: Two second-generation current conveyor (CCII+)-based resistance-capacitance (RC) square/triangular waveform generators, which have been derived from their voltage-mode op-amp-based schemes, with independent control of frequency are presented.
Abstract: Two second-generation current conveyor (CCII+)-based resistance-capacitance (RC) square/triangular waveform generators, which have been derived from their voltage-mode op-amp-based schemes, with independent control of frequency are presented in this paper. Each configuration consists of two positive second-generation conveyors (CCII(+)-ldquoArdquo and CCII(+)-ldquoBrdquo), three resistors, and one floating capacitor that is responsible for better linearity. The frequency of the waveform generators can independently be adjusted with any passive device. The circuits were built with commercially available current feedback operational amplifiers (AD844) and passive components used externally and tested for waveform generation and tunability. The measured results included in the paper show excellent linear variation of frequency as compared with existing reported configurations over the range from 25 Hz to 260 kHz. The configurations that are suitable for very large scale integration (VLSI) realization find application in capacitive and resistive sensors and in neuro-fuzzy systems.

95 citations

Journal ArticleDOI
TL;DR: The current paper presents a novel Schmitt trigger using two second-generation current conveyors and four resistors and its application as a relaxation oscillator that reports low sensitivities and has features suitable for VLSI implementation.
Abstract: The current paper presents a novel Schmitt trigger using two second-generation current conveyors and four resistors and its application as a relaxation oscillator. The performance of the proposed circuit is examined using Cadence and the model parameters of a 0.6µm CMOS process. The obtained results demonstrate excellent agreement with the theoretical values. The measured results based on commercially available current feedback operational amplifiers (AD 844 AN) are included and the non-idealities are also examined. The topology reports low sensitivities and has features suitable for VLSI implementation. Copyright © 2010 John Wiley & Sons, Ltd. (The current paper presents a novel Schmitt trigger using two second-generation current conveyors and four resistors and its application as a relaxation oscillator. The performance of the proposed circuit is examined using Cadence and the model parameters of a 0.6 m CMOS process. The obtained results demonstrate excellent agreement with the theoretical values.)

71 citations

Journal ArticleDOI
12 Mar 2021-Energies
TL;DR: A new heuristic-based hybrid optimization technique is presented to achieve the objective of automatic load frequency control of the multi-source power system and performs better than the other techniques.
Abstract: The automatic load frequency control for multi-area power systems has been a challenging task for power system engineers. The complexity of this task further increases with the incorporation of multiple sources of power generation. For multi-source power system, this paper presents a new heuristic-based hybrid optimization technique to achieve the objective of automatic load frequency control. In particular, the proposed optimization technique regulates the frequency deviation and the tie-line power in multi-source power system. The proposed optimization technique uses the main features of three different optimization techniques, namely, the Firefly Algorithm (FA), the Particle Swarm Optimization (PSO), and the Gravitational Search Algorithm (GSA). The proposed algorithm was used to tune the parameters of a Proportional Integral Derivative (PID) controller to achieve the automatic load frequency control of the multi-source power system. The integral time absolute error was used as the objective function. Moreover, the controller was also tuned to ensure that the tie-line power and the frequency of the multi-source power system were within the acceptable limits. A two-area power system was designed using MATLAB-Simulink tool, consisting of three types of power sources, viz., thermal power plant, hydro power plant, and gas-turbine power plant. The overall efficacy of the proposed algorithm was tested for two different case studies. In the first case study, both the areas were subjected to a load increment of 0.01 p.u. In the second case, the two areas were subjected to different load increments of 0.03 p.u and 0.02 p.u, respectively. Furthermore, the settling time and the peak overshoot were considered to measure the effect on the frequency deviation and on the tie-line response. For the first case study, the settling times for the frequency deviation in area-1, the frequency deviation in area-2, and the tie-line power flow were 8.5 s, 5.5 s, and 3.0 s, respectively. In comparison, these values were 8.7 s, 6.1 s, and 5.5 s, using PSO; 8.7 s, 7.2 s, and 6.5 s, using FA; and 9.0 s, 8.0 s, and 11.0 s using GSA. Similarly, for case study II, these values were: 5.5 s, 5.6 s, and 5.1 s, using the proposed algorithm; 6.2 s, 6.3 s, and 5.3 s, using PSO; 7.0 s, 6.5 s, and 10.0 s, using FA; and 8.5 s, 7.5 s, and 12.0 s, using GSA. Thus, the proposed algorithm performed better than the other techniques.

31 citations

01 Nov 2012
TL;DR: In this article, a square wave generator using three second generation current conveyers, five resistors and one capacitor with independent control of frequency is presented, which is suitable for very large scale integration (VLSI) implementation.
Abstract: At the outset the foregoing document is represented by square-wave generator using three second generation current conveyers, five resistors and one capacitor with independent control of frequency is presented. The unique features associated with such waveform generator are the easy tunability of frequency over a range of 15 Hz to 150 kHz, extremely low sensitivities as well as suitable for very large scale integration (VLSI) implementation. The working capacity of the proposed circuit is examined with the aid of SPICE models of IC AD 844 AN. Later, the circuit was built with commercially available current feedback operational amplifiers (AD 844 AN), passive components used externally and tested for waveform generation and tunability. Results achieved prove better agreement with the theoretical values. And the non-idealities also are examined.

31 citations

Journal ArticleDOI
TL;DR: By using two resistors and a single capacitor with second-generation differential current conveyor as an active element, a new square wave generator is proposed and implemented as mentioned in this paper, where the frequency of operation of the introduced model is varied with respect to the variation of remaining passive components.
Abstract: By using two resistors and a single capacitor with second-generation differential current conveyor as an active element, a new square wave generator is proposed and implemented. The frequency of operation of the introduced model is varied with respect to the variation of remaining passive components. Maximum reduction in noise effects caused by parasitics generated during integrated circuit fabrication is achieved with the scheme of grounded capacitor. The mathematical model of the selected circuit is verified in both simulation and experimental mode and found having matched in all three aspects. The elevated advantages and merits of the given topology are compared and tabulated contrary to the existing standard models. Using Cadence virtuoso with gpdk 180 nm libraries, the circuit is verified with a supply rail voltage of ±2.5 V. Later, prototype is also tested with commercially available current feedback operational amplifiers of AD844AN.

29 citations


Cited by
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01 Apr 1983

405 citations

01 Jan 2016
TL;DR: The logical effort designing fast cmos circuits is universally compatible with any devices to read and is available in the book collection an online access to it is set as public so you can download it instantly.
Abstract: Thank you for reading logical effort designing fast cmos circuits. As you may know, people have search numerous times for their chosen novels like this logical effort designing fast cmos circuits, but end up in infectious downloads. Rather than reading a good book with a cup of coffee in the afternoon, instead they are facing with some harmful bugs inside their desktop computer. logical effort designing fast cmos circuits is available in our book collection an online access to it is set as public so you can download it instantly. Our book servers hosts in multiple locations, allowing you to get the most less latency time to download any of our books like this one. Merely said, the logical effort designing fast cmos circuits is universally compatible with any devices to read.

137 citations