Turbo codes are widely used in satellite communications. When a Turbo decoder is implemented on a Field Programmable Gate Array (FPGA) in a space platform, it will suffer Single Event Upsets (SEUs) that can cause failures and disrupt communications. In this paper, the reliability of Turbo decoders implemented on FPGAs is evaluated. The Turbo decoder with Log-MAP algorithm is implemented on an SRAM-FPGA. Then, fault injection experiments are conducted to simulate the effects of SEU on the user memory and on the configuration memory of the Turbo decoder. Experimental results show that, for user memory, the SEU tolerance rate is over 95%, and the effect of SEU is related to the iteration period, bit position and Signal to Noise Ratio (SNR). In particular, SEUs on the control/address registers and on the interleaving table have a larger impact than on other registers or memories. For the configuration memory, the SEU tolerance rate is higher than 86%, and decreases as SNR increases. In general, the Turbo decoder exhibits a high reliability against SEUs, and the user memory is more reliable than the configuration memory.

Reliability Evaluation of Turbo Decoders Implemented on SRAM-FPGAs

Turbo codes are widely used in satellite communications. When a turbo decoder is implemented on a field-programmable gate array (FPGA) in a space platform, it will suffer single-event upsets (SEUs) that can cause failures and disrupt communications. Therefore, the protection of turbo decoders implemented on FPGAs is important. In this article, first the reliability of an SRAM-FPGA-implemented turbo decoder to SEUs on user memory and configuration memory is evaluated based on fault injection experiments. Then, based on the features of the turbo decoder and the characteristics of the failures revealed by the reliability study, a duplication with comparison (DWC) scheme is proposed for the protection of the turbo decoder. Experimental results show that the reliability of the protected turbo decoder to SEUs on user memory and configuration memory is improved by 99.4% and 95.6%, respectively. The resource usage is about $2.2\times $ that of an unprotected turbo decoder, which is significantly lower than the more than $3\times $ required by the traditional triple modular redundancy (TMR) protection. Finally, the proposed scheme is compared with another two protection schemes.

Design of SEU-Tolerant Turbo Decoders Implemented on SRAM-FPGAs

Turbo Codes are used in satellites and deep-space exploration as an innovative solution for error control codes. Radiation effects could add noise levels above the correction capability of the wireless communication modules, even though turbo codes were assuring low Bit Error Rates. SEU effects in the BER of a Turbo Decoder intended for space applications has been analyzed in detail, injecting millions of faults by means of using an Autonomous Emulation System.

Study of SEU effects in a Turbo Decoder Bit Error Rate

For the first time, we propose a single event effect (SEE) Equipment System with a reference static random access memory (SRAM) dosimeter, and provide the empirical correlation equations and real-time effective fluence (RTEF) with software for analysis. Quality Reliability Technology (QRT) SEE Equipment System can make and provide the radiation-beam-fluence information based on soft error count. We clarified that measurement results of soft error count with SRAM dosimeter show a high correlation factor of 0.965 with neutron fluence of Los Alamos Neutron Science Center (LANSCE). According to the correlation equation verified at LANSCE, we extrapolated regression analysis of radiation test data to different radiation facilities without beam profile information for real-time beam analysis. When using an SRAM dosimeter for detecting beam profile characteristics, exact data can be obtained if the radiation sensitivity of SRAM is measured and compensated. From this perspective, we distinguished SRAM’s radiation sensitivity from the beam profile using a step-wise scan test sequence, and accurate fluence which only contains a profile of the beam itself could be obtained. On the dosimeter, we uniformly arranged 41 SRAMs, which can cover the entire beam size of LANSCE Irradiation of Chips Electronics-II (ICE-II), 76.2 mm, and derive a more accurate correlation equation.

New Real-Time Fluence Correction Method With SRAM Dosimeter for High Accuracy Single-Event Upset Evaluation

For the first time, we propose a single event effect (SEE) Equipment System with a reference static random access memory (SRAM) dosimeter, and provide the empirical correlation equations and real-time effective fluence (RTEF) with software for analysis. Quality Reliability Technology (QRT) SEE Equipment System can make and provide the radiation-beam-fluence information based on soft error count. We clarified that measurement results of soft error count with SRAM dosimeter show a high correlation factor of 0.965 with neutron fluence of Los Alamos Neutron Science Center (LANSCE). According to the correlation equation verified at LANSCE, we extrapolated regression analysis of radiation test data to different radiation facilities without beam profile information for real-time beam analysis. When using an SRAM dosimeter for detecting beam profile characteristics, exact data can be obtained if the radiation sensitivity of SRAM is measured and compensated. From this perspective, we distinguished SRAM’s radiation sensitivity from the beam profile using a step-wise scan test sequence, and accurate fluence which only contains a profile of the beam itself could be obtained. On the dosimeter, we uniformly arranged 41 SRAMs, which can cover the entire beam size of LANSCE Irradiation of Chips Electronics-II (ICE-II), 76.2 mm, and derive a more accurate correlation equation. 

Wireless communications were clearly enhanced since 90's thanks to Turbo Codes. The use of these codes in satellites and deep-space exploration could be ruined if radiation effects exceed their correction capability. SEU sensitivity of a Turbo Decoder intended for space applications has been analyzed in detail, injecting millions of faults by means of an Autonomous Emulation System. Specifically, around 34.5 million faults per test in a sweep for four different parameters have been injected. This analysis provides accurate information about the most sensitive parts in the circuit in order to perform a selective hardening of the circuit. Results points out that hardening just the 9% of the circuit flip-flops reduces the failure rate induced by SEUs in 56%.

B. Lestriez

Papers

Analysis of Turbo Decoder Robustness Against SEU Effects

Study of SEU effects in a Turbo Decoder Bit Error Rate