Balaji Jayaraman

TL;DR: The design and implementation of an 80-kb logic-embedded non-volatile multi-time programmable memory (MTPM) with no added process complexity is described and high-temperature stress results show a projected data retention of 10 years at 125 °C.

TL;DR: An 80Kb logic Embedded Multi-Time Programmable Memory (MTPM) employs charge trapping and de-trapping behavior in 32nm/22nm High-K transistor, resulting in no added process complexity.

TL;DR: Hardware qualification certifies the OTPM to a 10-year 105 °C data retention specification and <3 PPM end of life bit error rate pre-ECC.

TL;DR: In this paper, a memory cell includes a pair of a first transistor and a second transistor providing a differential signal output, and a feedback circuit receives one of: a first signal or a second signal of the differential signals, and generates, in response, a feedback signal which is simultaneously applied to bias each current source load transistor in each the first and second circuit legs to amplify a voltage differential between the differential signal outputs.

TL;DR: In this article, a multi-time programmable memory (MTPM) memory cell and method of operating is presented. And the MTPM cell enables two bits of information to be stored as default bit values like an electrical fuse.