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Barrie Gilbert

Other affiliations: Tektronix
Bio: Barrie Gilbert is an academic researcher from Analog Devices. The author has contributed to research in topics: Amplifier & Direct-coupled amplifier. The author has an hindex of 32, co-authored 136 publications receiving 4651 citations. Previous affiliations of Barrie Gilbert include Tektronix.


Papers
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Journal ArticleDOI
TL;DR: Among the most signficant presentations in the 50-year history of the ISSCC, Barrie Gilbert's classic paper has become the fifth most frequently cited JSSC article and the first to be cited over 100 times.
Abstract: This paper describes a technique for the design of two-signal four-quadrant multipliers, linear on both inputs and useful from dc to an upper frequency very close to the f/SUB t/ of the transistors comprising the circuit. The precision of the product is shown to be limited primarily by the matching of the transistors, particularly with reference to emitter-junction areas. Expressions are derived for the nonlinearities due to various causes.

928 citations

Journal ArticleDOI
TL;DR: The bipolar junction transistor (BJT) differential pair widely used as the RF input stage is replaced by a bisymmetric Class-AB topology based on translinear principles, affording a greatly extended signal capacity.
Abstract: This paper outlines the basic theory of a development of the Gilbert mixer. The bipolar junction transistor (BJT) differential pair widely used as the RF input stage is replaced by a bisymmetric Class-AB topology based on translinear principles. It does not have inherent gain compression, affording a greatly extended signal capacity. The linearity of variants of the basic form is excellent, providing two-tone intermodulation intercepts as high as +30 dBm, without the expenditure of high bias currents. It can operate on supplies as low as 2.2 V, with a power consumption of under 5 mW. The input impedance of this mixer is accurately controllable (typically 50 /spl Omega/) and provides a true broadband match. The noise figure depends on design details and is generally not as low as in mixers specifically optimized for noise performance, although acceptable for many receiver applications. Inductively degenerated variants can be tuned to a narrowband match at microwave frequencies and provide full-mixing SSB noise figures as low as 6.5 dB, Practical realizations are in use in applications to 1.9 GHz.

305 citations

Journal ArticleDOI
TL;DR: Precision dc-coupled amplifiers having risetimes of less than a nanosecond have recently been fabricated using the monolithic planar process, characterized by a stage-gain- bandwidth product essentially equal to that of the transistors, and a very linear transfer characteristic, free from temperature dependence.
Abstract: Precision dc-coupled amplifiers having risetimes of less than a nanosecond have recently been fabricated using the monolithic planar process The design is based on a simple technique that has a broad range of applications and is characterized by a stage-gain- bandwidth product essentially equal to that of the transistors, and a very linear transfer characteristic, free from temperature dependence

289 citations

Journal ArticleDOI
Barrie Gilbert1
TL;DR: This paper reviews a class of linear transconductance cells, having proven value in a variety of communications applications, characterized by the use of parallel- or series-connected sets of differential pairs of bipolar transistors whose inputs and outputs are connected in parallel.
Abstract: This paper reviews a class of linear transconductance cells, having proven value in a variety of communications applications, characterized by the use of parallel- or series-connected sets of differential pairs of bipolar transistors whose inputs and outputs are connected in parallel. These cells invoke a well-developed concept, known as the "multi-tanh principle". The key idea is that the individually nonlinear (hyperbolic tangent, or tanh) transconductance functions may be separated along the input-voltage axis to achieve a much more linear overall function. The simplest of these is the so-called the "doublet"; the linearity criterion and noise behavior are discussed in detail. Some novel forms are presented. Higher order cells, including the "triplet", are then discussed, together with a novel method for achieving linear-in-dB gain control with an important modification for extending the dynamic range.

262 citations

Journal ArticleDOI
TL;DR: The linearized transconductance multiplier (LTM) has rapidly gained acceptance as the preferred approach to the realization of monolithic analog multipliers, and its simplicity has commended it for use in low-cost modular designs.
Abstract: Since its conception in 1967, the linearized transconductance multiplier (LTM) has rapidly gained acceptance as the preferred approach to the realization of monolithic analog multipliers, and its simplicity has commended it for use in low-cost modular designs. Accuracies of these units have been limited to about 0.5 to 2 percent, and drift and noise performance have generally been worse than that possible using the dominant alternative technique of pulse-width-height modulation. This paper shows that when careful attention is given to all the sources of error it is possible to attain a five-fold improvement in accuracy and corresponding reductions in the drift and noise levels. Odd-order nonlinearities can be reduced to negligible magnitudes by the use of active feedback, by substituting the usual resistive-bridge feedback path by an amplifier identical to that used as the input stages.

148 citations


Cited by
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Book
01 Jan 1999
TL;DR: The analysis and design techniques of CMOS integrated circuits that practicing engineers need to master to succeed can be found in this article, where the authors describe the thought process behind each circuit topology, but also consider the rationale behind each modification.
Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

4,826 citations

Journal ArticleDOI
J.R. Long1
TL;DR: A comprehensive review of the electrical performance of passive transformers fabricated in silicon IC technology is presented, and the characteristics of two-port and multiport transformers and baluns are presented from both computer simulation and experimental measurements.
Abstract: A comprehensive review of the electrical performance of passive transformers fabricated in silicon IC technology is presented. Two types of transformer construction are considered in detail, and the characteristics of two-port (1:1 and 1:n turns ratio) and multiport transformers (i.e., baluns) are presented from both computer simulation and experimental measurements. The effects of parasitics and imperfect coupling between transformer windings are outlined from the circuit point of view. Resonant tuning is shown to reduce the losses between input and output at the expense of operating bandwidth. A procedure for estimating the size of a monolithic transformer to meet a given specification is outlined, and circuit examples are used to illustrate the applications of the monolithic transformer in RF ICs.

780 citations

Patent
28 Sep 1998
TL;DR: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor as discussed by the authors, where the receiver and transmitter together define an active transponder.
Abstract: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

720 citations

Book
01 Jan 2004
TL;DR: This paper presents UWB Channel Models, a Hierarchical Model for Modulation Schemes of Receiver Structures, and Integrated Circuit Topologies, which describe the construction of receiver structures and the role of antennas in this system.
Abstract: Introduction. UWB Channel Models. Modulation Schemes. Receiver Structures. Integrated Circuit Topologies. UWB Antennas. Medium Access Control. Positioning.

679 citations

Journal ArticleDOI
TL;DR: It is shown that a CS-stage with deep submicron transistors can have high IIP2, because the nugsldr nuds cross-term in a two-dimensional Taylor approximation of the IDS(VGS, VDS) characteristic can cancel the traditionally dominant square-law term in the IDs(V GS) relation at practical gain values.
Abstract: An inductorless low-noise amplifier (LNA) with active balun is proposed for multi-standard radio applications between 100 MHz and 6 GHz. It exploits a combination of a common-gate (CGH) stage and an admittance-scaled common-source (CS) stage with replica biasing to maximize balanced operation, while simultaneously canceling the noise and distortion of the CG-stage. In this way, a noise figure (NF) close to or below 3 dB can be achieved, while good linearity is possible when the CS-stage is carefully optimized. We show that a CS-stage with deep submicron transistors can have high IIP2, because the nugsldr nuds cross-term in a two-dimensional Taylor approximation of the IDS(VGS, VDS) characteristic can cancel the traditionally dominant square-law term in the IDS(VGS) relation at practical gain values. Using standard 65 nm transistors at 1.2 V supply voltage, we realize a balun-LNA with 15 dB gain, NF +20 dBm, while simultaneously achieving an IIP3 > 0 dBm. The best performance of the balun is achieved between 300 MHz to 3.5 GHz with gain and phase errors below 0.3 dB and plusmn2 degrees. The total power consumption is 21 mW, while the active area is only 0.01 mm2.

579 citations