International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

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Art of electronics

This survey deals with 1/f noise in homogeneous semiconductor samples. A distinction is made between mobility noise and number noise. It is shown that there always is mobility noise with an /spl alpha/ value with a magnitude in the order of 10/sup -4/. Damaging the crystal has a strong influence on /spl alpha/, /spl alpha/ may increase by orders of magnitude. Some theoretical models are briefly discussed none of them can explain all experimental results. The /spl alpha/ values of several semiconductors are given. These values can be used in calculations of 1/f noise in devices. >

1/f Noise Sources

Schottky barrier field effect transistors based on individual catalytically-grown and undoped Si-nanowires (NW) have been fabricated and characterized with respect to their gate lengths. The gate length was shortened by the axial, self-aligned formation of nickel-silicide source and drain segments along the NW. The transistors with 10−30 nm NW diameters displayed p-type behaviour, sustained current densities of up to 0.5 MA/cm2, and exhibited on/off current ratios of up to 107. The on-currents were limited and kept constant by the Schottky contacts for gate lengths below 1 μm, and decreased exponentially for gate lengths exceeding 1 μm.

Silicon-Nanowire Transistors with Intruded Nickel-Silicide Contacts

Wide bandgap power devices have emerged as an often superior alternative power switch technology for many power electronic applications. These devices theoretically have excellent material properties enabling power device operation at higher switching frequencies and higher temperatures compared with conventional silicon devices. However, material defects can dominate device behavior, particularly over time, and this should be strongly considered when trying to model actual characteristics of currently available devices. Compact models of wide bandgap power devices are necessary to analyze and evaluate their impact on circuit and system performance. Available compact models, i.e., models compatible with circuit-level simulators, are reviewed. In particular, this paper presents a review of compact models for silicon carbide power diodes and MOSFETs.

https://works.bepress.com/kang-peng/1/download/

Modeling of Wide-Bandgap Power Semiconductor Devices—Part II

Successful operation of low-voltage 4H-SiC n-p-n bipolar transistors and digital integrated circuits based on emitter coupled logic is reported from -40 °C to 500 °C. Nonmonotonous temperature dependence (previously predicted by simulations but now measured) was observed for the transistor current gain; in the range -40 °C-300 °C it decreased when the temperature increased, while it increased in the range 300 °C-500 °C. Stable noise margins of ~ 1 V were measured for a 2-input OR/NOR gate operated on -15 V supply voltage from 0 °C to 500 °C for both OR and NOR output.

/pdf/500-circ-rm-c-bipolar-integrated-or-nor-gate-in-4h-sic-1vt21mlrxn.pdf

500 $^{\circ}{\rm C}$ Bipolar Integrated OR/NOR Gate in 4H-SiC

A monolithic bipolar operational amplifier (opamp) fabricated in 4H-SiC technology is presented. The opamp has been used in an inverting negative feedback amplifier configuration. Wide temperature ...

/pdf/a-monolithic-500-degrees-c-operational-amplifier-in-4h-sic-2euwgixujd.pdf

A Monolithic, 500 degrees C Operational Amplifier in 4H-SiC Bipolar Technology

Accurate physical modeling has been developed to describe the current gain of silicon carbide (SiC) power bipolar junction transistors (BJTs), and the results have been compared with measurements. Interface traps between SiC and SiO2 have been used to model the surface recombination by changing the trap profile, capture cross section, and concentration. The best agreement with measurement is obtained using one single energy level at 1 eV above the valence band, a capture cross section of 1 × 10-5 cm2, and a trap concentration of 2 × 1012 cm-2. Simulations have been performed at different temperatures to validate the model and characterize the temperature behavior of SiC BJTs. An analysis of the carrier concentration at different collector currents has been performed in order to describe the mechanisms of the current gain fall-off at a high collector current both at room temperature and high temperatures. At room temperature, high injection in the base (which has a doping concentration of 3 × 1017 cm-3) and forward biasing of the base-collector junction occur simultaneously, causing an abrupt drop of the current gain. At higher temperatures, high injection in the base is alleviated by the higher ionization degree of the aluminum dopants, and then forward biasing of the base-collector junction is the acting mechanism for the current gain fall-off. Forward biasing of the base-collector junction can also explain the reduction of the knee current with increasing temperature by means of the negative temperature dependence of the mobility.

Modeling and Characterization of Current Gain Versus Temperature in 4H-SiC Power BJTs

Operation up to 300 °C of low-voltage 4H-SiC n-p-n bipolar transistors and digital integrated circuits based on emitter-coupled logic is demonstrated. Stable noise margins of about 1 V are reported for a two-input or- nor gate operated on - 15 V supply voltage from 27 °C up to 300 °C. In the same temperature range, an oscillation frequency of about 2 MHz is also reported for a three-stage ring oscillator.

http://kth.diva-portal.org/smash/get/diva2:487321/FULLTEXT01

Design and Characterization of High-Temperature ECL-Based Bipolar Integrated Circuits in 4H-SiC

Low-frequency noise and hole mobility are studied in Si and SiGe surface channel pMOSFETs with various types of high-/spl kappa/ dielectric stacks (Al/sub 2/O/sub 3/, Al/sub 2/O/sub 3//HfAlO/sub x//Al/sub 2/O/sub 3/ and Al/sub 2/O/sub 3//HfO/sub 2//Al/sub 2/O/sub 3/) and TiN as gate electrode material. Comparisons are made with poly-SiGe-gated pMOSFETs as well as poly-Si/SiO/sub 2//Si references. The choice of channel material (strained SiGe or Si), gate material (TiN or poly-SiGe), and high-/spl kappa/ material (Al/sub 2/O/sub 3/, HfO/sub 2/, HfAlO/sub x/) is discussed in terms of mobility and low-frequency noise. A TiN gate in combination with a surface SiGe channel is advantageous both for enhanced mobility and low 1/f noise. The dominant sources of carrier scattering are identified by analyzing the mobility measured at elevated temperatures. The 1/f noise is studied from subthreshold to strong inversion conditions and at different substrate biases. The mobility fluctuation noise model and the number fluctuation noise model are both used to investigate the 1/f-noise origin.

Bengt Gunnar Malm

Papers

500 $^{\circ}{\rm C}$ Bipolar Integrated OR/NOR Gate in 4H-SiC

A Monolithic, 500 degrees C Operational Amplifier in 4H-SiC Bipolar Technology

Modeling and Characterization of Current Gain Versus Temperature in 4H-SiC Power BJTs

Design and Characterization of High-Temperature ECL-Based Bipolar Integrated Circuits in 4H-SiC

Comprehensive study on low-frequency noise and mobility in Si and SiGe pMOSFETs with high-/spl kappa/ gate dielectrics and TiN gate