Benoit Dufort

Bio: Benoit Dufort is an academic researcher from Philips. The author has contributed to research in topics: Signal generator & Signal. The author has an hindex of 12, co-authored 35 publications receiving 561 citations. Previous affiliations of Benoit Dufort include Laval University & McGill University.

On-chip analog signal generation for mixed-signal built-in self-test

Abstract: A new method for generating analog signals with very low complexity and hardware requirements has recently been introduced. It consists of periodically reproducing short optimized bitstreams recorded from the output of a sigma-delta modulator. In this paper, various types of signals generated using the bitstream approach are discussed. Two different silicon implementations are presented, and their performance is analyzed through experimental results. Various ways in which the generators can be used are also demonstrated. Emphasis is placed on the simplicity of the design process and its compact implementation, which are crucial considerations when implementing a built-in self-test strategy.

Signal generation using periodic single and multi-bit sigma-delta modulated streams

Abstract: This paper describes a new method to generate analog signals with high precision at very low hardware complexity. This method consists in reproducing periodically a recorded portion of the bitstream output of a sigma-delta modulate. This technique utilizes less hardware than conventional frequency synthesis methods and does not require a multi-bit DAC. However when a multi-bit DAC is already available, the technique can be used to increase the quality of the signal in the frequency band of interest using existing hardware. The paper demonstrates how this method can be used to generate signals for Built-in Self-Test and standard Analog and Mixed-Signal Test. Experimental results illustrating the design simplicity and low overhead are given.

Thermal nondestructive testing of carbon epoxy composites: detailed analysis and data processing

Abstract: A detailed description of results for thermal testing of carbon fibre reinforced plastic composites is presented. Theoretical analyses of 1D and 2D heat transfer problems illustrate the connections between all the parameters involved. Experimental results are obtained for standard carbon epoxy composites simulating the various types of defects (delaminations, Teflon inserts, cut-out and added plies). Particular image processing techniques as well as thermal tomography are also discussed.

Circuit and method for controlling a dynamic, bi-directional high voltage analog switch

Abstract: A circuit and method for controlling a switch is provided. Specifically, the circuit and method of the present invention provide a level shifter that controls a dynamic, bi-directional high voltage analog switch. The level shifter generally includes transistors, input terminals, a voltage source, a high negative voltage source, and a diode. The configuration of the level shifter, inter alia, allows the switch to be kept ON without a current/signal, prevents dissipation of transistors of the level shifter, and provides constant gate-to-source voltage on the switch transistors for improved linearity.

Collapsed mode operable cmut including contoured substrate

Abstract: A capacitive ultrasound transducer capable of operation in collapsed mode either with a reduced bias voltage, or with no bias voltage, is provided. The transducer includes a substrate that is contoured so that a middle region of the flexible membrane is collapsed against the substrate in the absence of a bias voltage. A non-collapsible gap may exists between the substrate and peripheral regions of the flexible membrane. The contour of the substrate may be such as to strain the flexible membrane past the point of collapse, or to mechanically interfere with the flexible membrane. The substrate may include a further membrane disposed beneath the flexible membrane, the further membrane being contoured so that the flexible membrane is collapsed against it. The substrate may a support disposed beneath the further membrane to deflect a corresponding portion of the further membrane upward toward the flexible membrane. The support may be a post. The transducer may be operated in collapse mode with an improved efficiency (k 2 eff ) as compared to otherwise similar conventional transducers exhibiting comparably uncontoured substrates. A related medical imaging system is provided, which may include an array of such transducers disposed on a common substrate. A method of operating such a transducer is provided that includes operating the transducer in the collapse mode in the absence of a bias voltage.

Plasma display apparatus and driving method thereof

Abstract: A plasma display apparatus and a driving method thereof are provided. The plasma display apparatus includes a plasma display panel and a timing controller. The plasma display panel is driven by dividing each of a plurality of subfields into a reset period, an address period and a sustain period. A subfield including a reset period, or the reset period and an address period, or the reset period, the address period and a sustain period is included between adjacent two subfields of the plurality of subfields.

Analysis of Pulsed Thermography Methods for Defect Depth Prediction

Abstract: Pulsed thermography is an effective technique for quantitative prediction of defect depth within a specimen. Several methods have been reported in the literature. In this paper, using an analysis based on a theoretical one-dimensional solution of pulsed thermography, we analyzed four representative methods. We show that all of the methods are accurate and converge to the theoretical solution under ideal conditions. Three methods can be directly used to predict defect depth. However, because defect features that appear on the surface during a pulsed thermography test are always affected by three-dimensional heat conduction within the test specimen, the performance and accuracy of these methods differs for defects of various sizes and depths. This difference is demonstrated and evaluated from a set of pulsed thermography data obtained from a specimen with several flat-bottom holes as simulated defects.

Plasma Display Panel

Abstract: A plasma display device includes: a dielectric layer on which a plurality of through-holes of a dielectric layer is disposed in a matrix shape; upper and lower electrode layers formed at both upper and lower surfaces of the dielectric layer; upper and lower substrates disposed on the outer surface of the upper and lower electrode layers; and a third electrode layer having a plurality of third electrodes which are formed between the upper substrate and the upper electrode layer, or the lower substrate and the lower electrode layer, and are insulated from the upper and lower electrode layers. Accordingly, a plasma display device can be realized which has stability and efficiency of a micro discharge. In addition, each pixel can concurrently carry out a sustain discharge by applying an alternating voltage to upper and lower electrodes forming sustain electrodes.

On-chip analog signal generation for mixed-signal built-in self-test

Abstract: A new method for generating analog signals with very low complexity and hardware requirements has recently been introduced. It consists of periodically reproducing short optimized bitstreams recorded from the output of a sigma-delta modulator. In this paper, various types of signals generated using the bitstream approach are discussed. Two different silicon implementations are presented, and their performance is analyzed through experimental results. Various ways in which the generators can be used are also demonstrated. Emphasis is placed on the simplicity of the design process and its compact implementation, which are crucial considerations when implementing a built-in self-test strategy.

A BIST scheme for on-chip ADC and DAC testing

Abstract: In this paper we present a BIST scheme for testing on-chip A/D and D/A converters. We discuss on-chip generation of linear ramps as test stimuli, and propose techniques for measuring the DNL and INL of the converters. We validate the scheme with software simulation-5% LSB (least significant bit) test accuracy can be achieved in the presence of reasonable analog imperfection.