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Bijoy Kumar Upadhyaya

Bio: Bijoy Kumar Upadhyaya is an academic researcher from Tripura Institute of Technology. The author has contributed to research in topics: VHDL & Field-programmable gate array. The author has an hindex of 7, co-authored 12 publications receiving 157 citations.

Papers
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01 Jan 2009
TL;DR: An efficient technique to model convolutional interleaver using a hardware description language is proposed and implemented on field programmable gate array (FPGA) chip, which implies lower power consumption and reduced delay in the interconnection network of the FPGA.
Abstract: Interleaving along with error correction coding is an effective way to deal with different types of error in digital data communication. Error burst due to multipath fading and from other sources in a digital channel may be effectively combated by interleaving technique. In this paper an efficient technique to model convolutional interleaver using a hardware description language is proposed and implemented on field programmable gate array (FPGA) chip. Our technique utilizes embedded shift register of FPGA chip to implement incremental shift register in the interleaver. Software simulation of the model is presented. The proposed technique reduces consumption of FPGA resources to a large extent compared to conventional implementation technique using flip-flop. This implies lower power consumption and reduced delay in the interconnection network of the FPGA. This technique is also efficient in reducing wastage of memory compared to memory based implementation technique for digital audio broadcasting (DAB) application.

13 citations

Proceedings ArticleDOI
24 Mar 2011
TL;DR: A novel technique to model the interleaver used in IEEE 802.11a and IEEE802.11g based WLAN in VHDL using Xilinx ISE using finite state machine (FSM) based address generator and FPGA's internal resource based memory is presented.
Abstract: In the recent past, the IEEE 802.11 based wireless LAN has emerged as a prevailing broadband indoor networking technology. Fast spread of wireless data communication systems and the ever increasing demand for faster data rates require quick design, implementation and test of new wireless algorithms for data communications. In this paper we present a novel technique to model the interleaver used in IEEE 802.11a and IEEE 802.11g based WLAN in VHDL using Xilinx ISE. Our proposed technique comprises of finite state machine (FSM) based address generator and FPGA's internal resource based memory. The FSM based approach provides higher operating frequency and better FPGA resource utilization. Use of FPGA's embedded memory offers advantages like reduced access time, lesser occupancy of circuit board and lower power consumption than external memory based techniques. The interleaver memory is modeled using two different types of embedded memory; one with dedicated and the other with distributed memory. Comparative analysis between the two techniques has been made in respect of use of FPGA's internal resources, maximum operating frequency and power consumption. The simulation result obtained using ModelSim XE-III software is also presented.

13 citations

01 Jan 2011
TL;DR: An improved technique to model the multimode interleaver used in IEEE 802.11a and IEEE802.11g based WLAN in VHDL using Xilinx ISE is presented and look up table based address generator and FPGA's embedded resource based optimized memory are modeled.
Abstract: IEEE 802.11 based wireless LAN is considered to be the most prevailing broadband indoor networking technology. Fast spread of wireless data communication systems and the ever increasing demand for faster data rates require quick design, implementation and test of new wireless algorithms for data communications. In this paper we present an improved technique to model the multimode interleaver used in IEEE 802.11a and IEEE 802.11g based WLAN in VHDL using Xilinx ISE. Our proposed technique has look up table based address generator and FPGA's embedded resource based optimized memory. This technique provides higher operating frequency and better FPGA resource utilization compared to available work so far. Use of FPGA's embedded memory offers advantages like reduced access time, lesser occupancy of circuit board and lower power consumption than external memory based techniques. The look up tables of the address generator is also modeled using FPGA's embedded memory and thereby making the design more efficient in terms of FPGA resource utilization. Comparative analysis of our proposed work with presently available works in literature has been made in respect of the use of FPGA's internal resources, maximum operating frequency and power consumption. The simulation result obtained using ModelSim XE-III software is also presented.

10 citations

Proceedings ArticleDOI
11 May 2018
TL;DR: In this paper a novel technique to implement gradient based edge detectors on FPGA platform is demonstrated and result endorses the successful design of gradientbased edge detection algorithm on FPDA platform.
Abstract: In this paper a novel technique to implement gradient based edge detectors on FPGA platform is demonstrated. Three most popular gradient based edge detection algorithms viz. Sobel, Prewitt and Robert Cross are modelled in hardware description language and implemented on Terasic VEEK-MT FPGA development board. The RGB image is first transformed into gray scale using luminosity method which is fed to line buffers to apply appropriate edge detection mask. An edge detection processor block is designed wherein the relevant filter mask is applied followed by generation of horizontal and vertical gradient. The root mean square value of the two gradient components is computed. The pixel value so obtained is compared against a user defined threshold before applying to the LCD module for display. The proposed implementation is tested on both still and video images. Implementation result endorses the successful design of gradient based edge detection algorithm on FPGA platform.

3 citations

Journal ArticleDOI
TL;DR: A memory efficient Look-up Table (LUT) based address generator for the de-interleaver used in OFDM-WiMAXtransreceiver and comparative study of FPGA implementation results of the design on two different platforms is presented.
Abstract: In this paper, a memory efficient Look-up Table (LUT) based address generator for the de-interleaver used in OFDM-WiMAXtransreceiver is proposed. The relationships between various address LUTs implementing different interleaver / de-interleaver depths within a modulation scheme have been exploited to model the proposed address generator. The proposed design shows 81.25% saving of memory blocks in comparison with conventional technique. Hardware structure of the address generator is developed and is converted into a VHDL model using Xilinx Integrated Software Environment (ISE). Simulation results obtained using ModelSim XE-III verifies the functionality of the proposed design. Comparative study of FPGA implementation results of the design on two different platforms is presented. Performance improvement of approximately 30% in terms of maximum operating frequency over a recent work is also obtained. 

1 citations


Cited by
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Journal ArticleDOI
TL;DR: In this article, a review of recent developments in piezoelectric nanostructured materials, polymers, polymer nanocomposites, and polyamide films for implementation in energy harvesting is presented.
Abstract: Piezoelectric materials are widely referred to as "smart" materials because they can transduce mechanical pressure acting on them to electrical signals and vice versa. They are extensively utilized in harvesting mechanical energy from vibrations, human motion, mechanical loads, etc., and converting them into electrical energy for low power devices. Piezoelectric transduction offers high scalability, simple device designs, and high-power densities compared to electro-magnetic/static and triboelectric transducers. This review aims to give a holistic overview of recent developments in piezoelectric nanostructured materials, polymers, polymer nanocomposites, and piezoelectric films for implementation in energy harvesting. The progress in fabrication techniques, morphology, piezoelectric properties, energy harvesting performance, and underpinning fundamental mechanisms for each class of materials, including polymer nanocomposites using conducting, non-conducting, and hybrid fillers are discussed. The emergent application horizon of piezoelectric energy harvesters particularly for wireless devices and self-powered sensors is highlighted, and the current challenges and future prospects are critically discussed.

146 citations

Journal ArticleDOI
TL;DR: A systematic literature review protocol is proposed to study how mobile computing assists IoT applications in healthcare, contributes to the current and future research work of IoT in the healthcare system, brings privacy and security in health IoT devices, and affects the IoT inthe healthcare system.
Abstract: The impact of Internet of Things has been revolutionized in all fields of life, but its impact on the healthcare system has been significant due to its cutting edge transition. The role of Internet of Things becomes more dominant when it is supported by the features of mobile computing. The mobile computing extends the functionality of IoT in healthcare environment by bringing a massive support in the form of mobile health (m-health). In this research, a systematic literature review protocol is proposed to study how mobile computing assists IoT applications in healthcare, contributes to the current and future research work of IoT in the healthcare system, brings privacy and security in health IoT devices, and affects the IoT in the healthcare system. Furthermore, the intentions of the paper are to study the impacts of mobile computing on IoT in healthcare environment or smart hospitals in light of our systematic literature review protocol. The proposed study reports the papers that were included based on filtering process by title, abstract, and contents, and a total of 116 primary studies were included to support the proposed research. These papers were then analysed for research questions defined for the proposed study.

110 citations

Journal ArticleDOI
TL;DR: This paper provides a generalized, but detailed analysis of the power consumption causes (internal and external) of a smartphone and also offers suggestive measures to minimize the consumption for each factor.
Abstract: The advancement and popularity of smartphones have made it an essential and all-purpose device. But lack of advancement in battery technology has held back its optimum potential. Therefore, considering its scarcity, optimal use and efficient management of energy are crucial in a smartphone. For that, a fair understanding of a smartphone’s energy consumption factors is necessary for both users and device manufacturers, along with other stakeholders in the smartphone ecosystem. It is important to assess how much of the device’s energy is consumed by which components and under what circumstances. This paper provides a generalized, but detailed analysis of the power consumption causes (internal and external) of a smartphone and also offers suggestive measures to minimize the consumption for each factor. The main contribution of this paper is four comprehensive literature reviews on: 1) smartphone’s power consumption assessment and estimation (including power consumption analysis and modelling); 2) power consumption management for smartphones (including energy-saving methods and techniques); 3) state-of-the-art of the research and commercial developments of smartphone batteries (including alternative power sources); and 4) mitigating the hazardous issues of smartphones’ batteries (with a details explanation of the issues). The research works are further subcategorized based on different research and solution approaches. A good number of recent empirical research works are considered for this comprehensive review, and each of them is succinctly analysed and discussed.

87 citations

Journal ArticleDOI
TL;DR: In this paper, the authors highlight the working principle and the past research work carried out by the various authors that utilize FSAM as a fabrication process and present the current scenario and future scope of the FSAM process are also discussed in detail in terms of its utilization in various sectors of engineering along with estimated future trends.
Abstract: Friction stir additive manufacturing (FSAM) method is one of the growing techniques of additive manufacturing that utilizes the concept of solid state friction stir processing to develop multilayer components through layer by layer joining. The present work aims to highlight the working principle and the past research work carried out by the various authors that utilize FSAM as a fabrication process. Based on the available experimental data, the summary of additive based friction stir processes, type of machine for fabrication, materials, process parameters taken for the study is also discussed in detail. Mechanical properties such as grain refinement, microhardness variation, and tensile strength are also summarized, in comparison with their base materials. In addition, the current scenario and future scope of the FSAM process are also discussed in detail in terms of its utilization in various sectors of engineering along with estimated future trends.

76 citations

Journal ArticleDOI
TL;DR: The challenges in the successful realization of IoNT are discussed critically, along with a special discussion on internet of bio-nano things (IoBNT) and its potential in making IoNT more compatible to human body.
Abstract: Healthcare sector is probably the most benefited from the applications of nanotechnology. The nanotechnology, in the forms of nanomedicine, nanoimplants, nanobiosensors along with the internet of nano things (IoNT), has the potential to bring a revolutionizing advancement in the field of medicine and healthcare services. The primary aim of this paper is to explore the clinical and medical possibilities of these different implementations of nanotechnology. This paper provides a comprehensive overview of nanotechnology, biosensors, nanobiosensors, and IoNT. Furthermore, multilevel taxonomies of nanotechnology, nanoparticles, biosensors, nanobiosensors, and nanozymes are presented. The potential medical and clinical applications of these technologies are discussed in details with several examples. This paper specifically focuses on IoNT and its role in healthcare. In addition to describing a general architecture of IoNT for healthcare, the communication architecture of the IoNT is also explained. The challenges in the successful realization of IoNT are also discussed critically, along with a special discussion on internet of bio-nano things (IoBNT) and its potential in making IoNT more compatible to human body.

72 citations