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Bo Yu

Researcher at University of California, San Diego

Publications -  23
Citations -  1183

Bo Yu is an academic researcher from University of California, San Diego. The author has contributed to research in topics: MOSFET & Capacitance. The author has an hindex of 15, co-authored 23 publications receiving 1125 citations. Previous affiliations of Bo Yu include University of San Diego & Qualcomm.

Papers
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A Distributed Model for Border Traps in $\hbox{Al}_{2} \hbox{O}_{3}-\hbox{InGaAs}$ MOS Devices

TL;DR: In this paper, a distributed border trap model based on tunneling between the semiconductor surface and trap states in the gate dielectric film is formulated to account for the observed frequency dispersion in the capacitance and conductance of Al2O3/InGaAs MOS devices biased in accumulation.
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Explicit Continuous Models for Double-Gate and Surrounding-Gate MOSFETs

TL;DR: Explicit continuous models for both double-gate and surrounding-gate MOSFETs are presented in this paper, which can express the drain current, terminal charge, transconductance, and transcapacitance as explicit functions of applied voltages as well as the structural parameters.
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Scaling of Nanowire Transistors

TL;DR: In this article, the scaling of nanowire transistors to 10-nm gate lengths and below is considered and compared with the published experimental data of nan-wire transistors, and the performance limit of a nan-ire transistor is assessed by applying a ballistic current model.
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A Distributed Bulk-Oxide Trap Model for $\hbox{Al}_{2} \hbox{O}_{3}$ InGaAs MOS Devices

TL;DR: In this paper, a distributed circuit model for bulk-oxide traps based on tunneling between the semiconductor surface and trap states in the gate dielectric film is presented, analytically solved at dc.