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Bogdan Vlad Popescu

Bio: Bogdan Vlad Popescu is an academic researcher. The author has contributed to research in topics: Monte Carlo method & Nanowire. The author has an hindex of 1, co-authored 1 publications receiving 3 citations.

Papers
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01 Jan 2015
TL;DR: In this article, the electron transport, frequency response and optoelectronic properties of state-of-the-art single InAs nanowire field effect transistors were investigated using both a full-band Monte Carlo simulator and an advanced hydrodynamic simulator.
Abstract: In this work, we have investigated the electron transport, frequency response and optoelectronic properties of state-of-the-art single InAs nanowire field effect transistors, using both a full-band Monte Carlo simulator and an advanced hydrodynamic simulator. We perform a detailed high-frequency analysis, calibrating our simulations with experimental measurements that are successfully reproduced. We are thus able to make predictions about the HF performance and via a small signal analysis we determine the intrinsic cut-off frequency and maximum frequency of oscillation.

3 citations


Cited by
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Proceedings ArticleDOI
R.W. Kelsall1
03 Apr 1995
TL;DR: If the authority ascribed to Monte Carlo models of devices at 1/spl mu/m feature size is to be maintained, modelling of the fundamental physics must be further improved, and the device model must be made more realistic.
Abstract: There can be little doubt that the Monte Carlo method for semiconductor device simulation has enormous power as a research tool. It represents a detailed physical model of the semiconductor material(s), and provides a high degree of insight into the microscopic transport processes. However, if the authority ascribed to Monte Carlo models of devices at 1/spl mu/m feature size is to be maintained for devices below O.1/spl mu/m, modelling of the fundamental physics must be further improved. And if the Monte Carlo method is to be successful as a semiconductor device design tool, the device model must be made more realistic. Success in the industrial sector depends on this, but also on achieving fast run-times optimisation - where the scope and need for ingenuity is now greatest.

436 citations

01 Jan 2013
TL;DR: In this article, the authors investigated the transport in InAs nanowire-based wrap gate field effect transistors and their high-frequency performance and deduced that the intrinsic highfrequency performance of these devices is at least one order of magnitude higher than currently reached today, in terms of maximum oscillation frequency and cutoff frequency, and that the parasitic network is the major limiting factor.
Abstract: In this paper, we have investigated the transport in InAs nanowire-based wrap gate field-effect transistors and their high-frequency performance. State-of-the-art InAs devices reveal excellent dc performance in terms of transconductance, subthreshold slope, and saturation behavior. Only, very recently high-frequency measurements have been performed on these devices, demonstrating that they can operate well in the gigahertz range. However, their intrinsic high-frequency performance and the limiting mechanism in reaching the optimal limit have not been fully understood yet. One of the main reasons lies in the technological difficulties in contacting the nanometer devices and in the parasitic elements that arise from this imperfect measurement setup. Making use of a sophisticated hydrodynamic simulator, we are able to successfully reproduce the experimental output characteristics over the entire measurement range. Next, we also perform a detailed simulation study of the frequency response for the measured samples, with and without an extrinsic parasitic network. Based on our simulations, we deduce that the intrinsic high-frequency performance of these devices is at least one order of magnitude higher than currently reached today, in terms of maximum oscillation frequency and cutoff frequency, and that the parasitic network is the major limiting factor. Furthermore, we identify the parasitic elements that have the greatest impact on the device performance and we explain their working principles.

4 citations

Journal ArticleDOI
TL;DR: The 3-D transistor is poised to go mainstream. And to accelerate the process, some have opted to take an unusual step: marrying the new transistors with an older approach to building the wiring that ties them together on a chip as mentioned in this paper.
Abstract: The 3-D transistor is poised to go mainstream. After falling behind Intel, the world's biggest foundries are all gearing up to produce these cutting edge switches. And to accelerate the process, some have opted to take an unusual step: marrying the new transistors with an older approach to building the wiring that ties them together on a chip.

2 citations