B
Brian McGinley
Researcher at National University of Ireland, Galway
Publications - 46
Citations - 1309
Brian McGinley is an academic researcher from National University of Ireland, Galway. The author has contributed to research in topics: Spiking neural network & Lossy compression. The author has an hindex of 19, co-authored 46 publications receiving 1132 citations. Previous affiliations of Brian McGinley include Galway-Mayo Institute of Technology & National University of Ireland.
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Journal ArticleDOI
Compressed Sensing for Bioelectric Signals: A Review
TL;DR: The aim is to provide a detailed analysis of the current trends in CS, focusing on the advantages and disadvantages in compressing different biosignals and its suitability for deployment in embedded hardware.
Journal ArticleDOI
Scalable Hierarchical Network-on-Chip Architecture for Spiking Neural Network Hardware Implementations
Snaider Carrillo,Jim Harkin,Liam McDaid,Fearghal Morgan,Sandeep Pande,Seamus Cawley,Brian McGinley +6 more
TL;DR: A novel hierarchical network-on-chip (H-NoC) architecture for SNN hardware is presented, which aims to address the scalability issue by creating a modular array of clusters of neurons using a hierarchical structure of low and high-level routers.
Journal ArticleDOI
Maintaining Healthy Population Diversity Using Adaptive Crossover, Mutation, and Selection
TL;DR: Analysis of the adaptive operators illustrates that the key benefit of ACROMUSE is the synergy of the operators working together to achieve an effective balance between exploration and exploitation.
Journal ArticleDOI
Adaptive Dictionary Reconstruction for Compressed Sensing of ECG Signals
TL;DR: A novel adaptive dictionary (AD) reconstruction scheme to improve the performance of compressed sensing with electrocardiogram signals (ECG) and outperforms all existing CS implementations in terms of signal fidelity at each compression ratio tested.
Journal ArticleDOI
A reconfigurable and biologically inspired paradigm for computation using network-on-chip and spiking neural networks
TL;DR: A novel field programmable neural network architecture (EMBRACE), incorporating low-power analogue spiking neurons, interconnected using a Network-on-Chip architecture is proposed, and the performance of the architecture is discussed.