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Author

Byunghoo Jung

Other affiliations: Samsung, University of Minnesota
Bio: Byunghoo Jung is an academic researcher from Purdue University. The author has contributed to research in topics: CMOS & Phase-locked loop. The author has an hindex of 26, co-authored 125 publications receiving 1892 citations. Previous affiliations of Byunghoo Jung include Samsung & University of Minnesota.


Papers
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Journal ArticleDOI
TL;DR: The design, fabrication, and characterization of a novel low-frequency meandering piezoelectric vibration energy harvester designed for sensor node applications where the node targets a width-tolength aspect ratio close to 1:1 while simultaneously achieving a low resonant frequency is presented.
Abstract: The design, fabrication, and characterization of a novel low-frequency meandering piezoelectric vibration energy harvester is presented. The energy harvester is designed for sensor node applications where the node targets a width-tolength aspect ratio close to 1:1 while simultaneously achieving a low resonant frequency. The measured power output and normalized power density are 118 μW and 5.02 μW/mm3/g2, respectively, when excited by an acceleration magnitude of 0.2 g at 49.7 Hz. The energy harvester consists of a laser-machined meandering PZT bimorph. Two methods, strain-matched electrode (SME) and strain-matched polarization (SMP), are utilized to mitigate the voltage cancellation caused by having both positive and negative strains in the piezoelectric layer during operation at the meander's first resonant frequency. We have performed finite element analysis and experimentally demonstrated a prototype harvester with a footprint of 27 x 23 mm and a height of 6.5 mm including the tip mass. The device achieves a low resonant frequency while maintaining a form factor suitable for sensor node applications. The meandering design enables energy harvesters to harvest energy from vibration sources with frequencies less than 100 Hz within a compact footprint.

109 citations

Journal ArticleDOI
TL;DR: The presented work shows the feasibility of a low power high data rate wireless inter-chip data link and wireless heterogeneous multi-chip networks.
Abstract: A 43-GHz wireless inter-chip data link including antennas, transmitters, and receivers is presented. The industry standard bonding wires are exploited to provide high efficiency and low-cost antennas. This type of antennas can provide an efficient horizontal communication which is hard to achieve using conventional on-chip antennas. The system uses binary amplitude shift keying (ASK) modulation to keep the design compact and power efficient. The transmitter includes a differential to single-ended modulator and a two-stage power amplifier (PA). The receiver includes a low-noise amplifier (LNA), pre-amplifiers, envelope detectors (ED), a variable gain amplifier (VGA), and a comparator. The chip is fabricated in 180-nm SiGe BiCMOS technology. With power-efficient transceivers and low-cost high-performance antennas, the implemented inter-chip link achieves bit-error rate (BER) around 10-8 for 6 Gb/s over a distance of 2 cm. The signal-to-noise ratio (SNR) of the recovered signal is about 24 dB with 18 ps of rms jitter. The transmitter and receiver consume 57 mW and 60 mW, respectively, including buffers. The bit energy efficiency excluding test buffers is 17 pJ/bit. The presented work shows the feasibility of a low power high data rate wireless inter-chip data link and wireless heterogeneous multi-chip networks.

97 citations

Journal ArticleDOI
TL;DR: A low-power, low complexity, and wide-dynamic-range universal sensor readout circuit that converts the sensing capacitance or resistance changes to digital duty cycles based on pulsewidth modulation (PWM) is presented.
Abstract: We present a low-power, low complexity, and wide-dynamic-range universal sensor readout circuit that converts the sensing capacitance or resistance changes to digital duty cycles based on pulsewidth modulation (PWM). The readout circuit utilizes a RC-controlled pulse generator and produces pulse signals whose duration width is proportional to the charging time. The circuit is comprised of complementary CMOS circuit that enables the proposed design to consume significantly less power compared with traditional designs. The proposed design is universal and can be configured according to the application requirements. The sensor interface chip is designed and fabricated in TSMC 0.13-μm CMOS technology. The proposed interface achieves 13-aF to 10.7-nF capacitance and 5-Ω to 11.5-MΩ resistance sensing ranges with 60- μW power consumption. The functionality of the full circuit, including circuit analysis, noise analysis and measurement results, has been demonstrated.

90 citations

Journal ArticleDOI
TL;DR: A technique is proposed that removes the blind zone caused by the precharge time of the internal nodes in latch-based PFDs and achieves a small blind zone close to the limit imposed by process-voltage-temperature variations.
Abstract: Blind zone in a phase-frequency detector (PFD) reduces the input detection range and aggravates cycle slips. This brief analyzes the blind zone in latch-based PFDs and proposes a technique that removes the blind zone caused by the precharge time of the internal nodes. With the proposed technique, the PFD achieves a small blind zone close to the limit imposed by process-voltage-temperature variations. The comparison between the proposed design and previous works is presented. Fabricated in a 130-nm CMOS technology, the measured blind zone is 61 ps, which is smaller than that of the existing topologies by almost 100 ps.

81 citations

Journal ArticleDOI
TL;DR: In this article, a cross-coupled negative resistance cell was proposed to improve the performance of high-frequency voltage-controlled oscillators (VCOs) by using a capacitively emitter degenerated topology.
Abstract: In this paper, we evaluate the high-frequency performance limitations of traditional LC voltage-controlled oscillators (VCOs) that use a cross-coupled negative resistance cell and propose a new topology that overcomes these limitations. The proposed cell is based on a capacitively emitter degenerated topology which uses a cross-coupled MOS pair as the degeneration cell. The cross-coupled MOS pair contributes additional conductance and results in a higher maximum attainable oscillation frequency and better negative resistance characteristics as compared to the other topologies at high frequencies. These properties combined with its small effective capacitance enable low-power low-noise high-frequency VCO implementations. The proposed topology is demonstrated through a 20-GHz fully integrated LC VCO implemented in the IBM SiGe 0.25-/spl mu/m BiCMOS process. A comparison of its figure of merit with previously reported 20-GHz VCOs shows the effectiveness of the proposed topology.

70 citations


Cited by
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Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

01 Jan 2016
TL;DR: The design of analog cmos integrated circuits is universally compatible with any devices to read and is available in the book collection an online access to it is set as public so you can download it instantly.
Abstract: Thank you for downloading design of analog cmos integrated circuits. Maybe you have knowledge that, people have look hundreds times for their chosen books like this design of analog cmos integrated circuits, but end up in malicious downloads. Rather than enjoying a good book with a cup of coffee in the afternoon, instead they juggled with some harmful virus inside their computer. design of analog cmos integrated circuits is available in our book collection an online access to it is set as public so you can download it instantly. Our digital library spans in multiple countries, allowing you to get the most less latency time to download any of our books like this one. Kindly say, the design of analog cmos integrated circuits is universally compatible with any devices to read.

1,038 citations

Journal ArticleDOI
Abstract: This paper presents a state-of-the-art review on a hot topic in the literature, i.e., vibration based energy harvesting techniques, including theory, modelling methods and the realizations of the piezoelectric, electromagnetic and electrostatic approaches. To minimize the requirement of external power source and maintenance for electric devices such as wireless sensor networks, the energy harvesting technique based on vibrations has been a dynamic field of studying interest over past years. One important limitation of existing energy harvesting techniques is that the power output performance is seriously subject to the resonant frequencies of ambient vibrations, which are often random and broadband. To solve this problem, researchers have concentrated on developing efficient energy harvesters by adopting new materials and optimising the harvesting devices. Particularly, among these approaches, different types of energy harvesters have been designed with consideration of nonlinear characteristics so that the frequency bandwidth for effective energy harvesting of energy harvesters can be broadened. This paper reviews three main and important vibration-to-electricity conversion mechanisms, their design theory or methods and potential applications in the literature. As one of important factors to estimate the power output performance, the energy conversion efficiency of different conversion mechanisms is also summarised. Finally, the challenging issues based on the existing methods and future requirement of energy harvesting are discussed.

628 citations

Patent
23 Dec 2005
TL;DR: In this paper, a liquid crystal display device is described, which reduces the number of masks and improves an aperture ratio, and a method for fabricating the same is presented. But it is not shown how to construct such a display.
Abstract: Disclosed are a liquid crystal display device which reduces the number of masks and improves an aperture ratio, and a method for fabricating the same. The liquid crystal display device includes gate and data lines perpendicularly intersecting on a substrate having pixel and pad parts; a thin film transistor on the substrate at the intersection of the gate and data lines; a pixel electrode on the substrate at the pixel part and connected directly to a drain electrode of the thin film transistor; an insulating film on the overall surface of the substrate including the pixel electrode and the thin film transistor; an organic film on the insulating film over the thin film transistor and the data line; and a common electrode of slit shapes overlapping the pixel electrode such that the insulating film is interposed between the common electrode and the pixel electrode.

601 citations

Journal ArticleDOI
TL;DR: A comprehensive review on the state-of-the-art of piezoelectric energy harvesting is presented, including basic fundamentals and configurations, materials and fabrication, performance enhancement mechanisms, applications, and future outlooks.
Abstract: The last decade has witnessed significant advances in energy harvesting technologies as a possible alternative to provide a continuous power supply for small, low-power devices in applications, such as wireless sensing, data transmission, actuation, and medical implants. Piezoelectric energy harvesting (PEH) has been a salient topic in the literature and has attracted widespread attention from researchers due to its advantages of simple architecture, high power density, and good scalability. This paper presents a comprehensive review on the state-of-the-art of piezoelectric energy harvesting. Various key aspects to improve the overall performance of a PEH device are discussed, including basic fundamentals and configurations, materials and fabrication, performance enhancement mechanisms, applications, and future outlooks.

513 citations