International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

The field of terahertz integrated technology has undergone significant development in the past ten years. This has included work on different substrate technologies such as III–V semiconductors and silicon, work on field-effect transistor devices and heterojunction bipolar devices, and work on both fully electronic and hybrid electronic–photonic systems. While approaches in electronic and photonics can often seem distinct, techniques have blended in the terahertz frequency range and many emerging systems can be classified as photonics-inspired or hybrid. Here, we review the development of terahertz integrated electronic and hybrid electronic–photonic systems, examining, in particular, advances that deliver important functionalities for applications in communication, sensing and imaging. Many of the advances in integrated systems have emerged, not from improvements in single devices, but rather from new architectures that are multifunctional and reconfigurable and break the trade-offs of classical approaches to electronic system design. We thus focus on these approaches to capture the diversity of techniques and methodologies in the field. This Review Article examines the development of terahertz integrated electronic and hybrid electronic–photonic systems, considering, in particular, advances that deliver important functionalities for applications in communication, sensing and imaging.

Terahertz integrated electronic and hybrid electronic–photonic systems

A 1 k-pixel camera chip for active terahertz video recording at room-temperature has been fully integrated in a 65-nm CMOS bulk process technology. The 32 × 32 pixel array consists of 1024 differential on-chip ring antennas coupled to NMOS direct detectors operated well-beyond their cutoff frequency based on the principle of distributed resistive self-mixing. It includes row and column select and integrate-and-dump circuitry capable of capturing terahertz videos up to 500 fps. The camera chip has been packaged together with a 41.7-dBi silicon lens (measured at 856 GHz) in a 5 × 5 × 3 cm3 camera module. It is designed for continuous-wave illumination (no lock-in technique required). In this video-mode the camera operates up to 500 fps. At 856 GHz it achieves a responsivity Rv of about 115 kV/W (incl. a 5-dB VGA gain) and a total noise equivalent power (NEPtotal) of about 12 nW integrated over its 500-kHz video bandwidth. At a 5-kHz chopping frequency (non-video mode) a single pixel can provide a maximum responsivity Rv of 140 kV/W (incl. a 5-dB VGA gain) and a minimum noise equivalent power ( NEP) of 100 pW/√Hz at 856 GHz. The wide-band antenna and pixel design achieves a 3-dB bandwidth of at least 790-960 GHz.

A 1 k-Pixel Video Camera for 0.7–1.1 Terahertz Imaging Applications in 65-nm CMOS

Traditional terahertz (THz) equipment faces major obstacles in providing the system cost and compactness necessary for widespread deployment of THz applications. Because of this, the field of THz integrated circuit (THz IC) design in CMOS and SiGe HBT technologies has surged in the last decade. An interplay of advances in silicon process technology, design technique, and microelectronic packaging promises to narrow the gap between the requirements and the reality of system cost and performance of THz components. Furthermore, the scalability, reconfigurability, and signal processing features of silicon technology have initiated research in complex THz ICs that expand the functionality of THz systems; this has enabled new applications, methods, and algorithms. This paper reviews the progress in THz IC research and investigates several realizations of THz imaging and sensing applications with silicon-based components regarding their motivation, system performance, and challenges. THz computed tomography, broadband multicolor imaging, high-resolution FMCW radar imaging, subwavelength resolution near-field imaging, and compressed sensing are presented.

Terahertz Imaging and Sensing Applications With Silicon-Based Technologies

This paper addresses the integration of a new generation of high-speed SiGe HBTs with f T / f max of 300/500 GHz and minimum CML ring oscillator gate delays of 2.0 ps in a 0.13 μm BiCMOS technology. Technological measures for improving the speed of the HBTs compared to our first 0.13 μm BiCMOS generation are discussed. These include scaling of lateral device dimensions and doping profiles as well as a reduced thermal budget and reduced salicide resistance.

Half-Terahertz SiGe BiCMOS technology

A SiGe HBT technology featuring f T /f max /BV CEO =300GHz/500GHz/1.6V and a minimum CML ring oscillator gate delay of 2.0 ps is presented. The speed-improvement compared to our previous SiGe HBT generations originates from lateral device scaling, a reduced thermal budget, and changes of the emitter and base composition, of the salicide resistance as well as of the low-doped collector formation.

SiGe HBT technology with f T /f max of 300GHz/500GHz and 2.0 ps CML gate delay

An experimental SiGe HBT technology featuring fT/fmax/BVCEO = 505 GHz/720 GHz/1.6 V and a minimum CML ring oscillator gate delay of 1.34 ps is presented. The improved speed compared to our previous SiGe HBT developments originates primarily from an optimized vertical profile, an additional decrease of the base and emitter resistance which is made possible by combining millisecond annealing with a low-temperature backend, and from lateral device scaling.

SiGe HBT with fx/fmax of 505 GHz/720 GHz

This paper describes the technology development activities within the European funding project DOTSEVEN done by Infineon and IHP. After half of the project duration Infineon has developed a 130 nm SiGe BiCMOS technology with f T of 250 GHz and f max of 370 GHz. State-of-the-art MMIC performance is demonstrated by a 77 GHz automotive radar transmitter. The suitability of IHP´s advanced SiGe HBT module with epitaxial base link for future industrial BiCMOS platforms is demonstrated by integrating it in Infineon's 130 nm process resulting in an f max of 500 GHz, 1.8 ps gate delay and a record 161 GHz static frequency divider. IHP has achieved an f max of 570 GHz for the first time using an HBT concept with non-selective epitaxial base deposition and an elevated extrinsic base.

SiGe HBT and BiCMOS process integration optimization within the DOTSEVEN project

We demonstrate a novel back-side processed, back to front self-aligned BiCMOS embedded RF-MEMS switch for the 90 to 140GHz frequency band. The switch integration is very simple, adding only one mask step to the underlying high-performance BiCMOS process. Moreover, it offers low cost, wafer level packaging. The insertion loss of the switch is less than 0.5dB up to 140GHz, and isolation is better than 15dB in the frequency range of 90 to 140GHz. The switch-on time is measured as 10µs. No performance degradation was observed after 5 billion cold switching cycles demonstrating the high reliability of the switch. An on-chip charge-pump (CP) circuit is realized using enhanced PMOS transistor to excite the switch with an output voltage of up to 50V and a rise time of 2µs.

BiCMOS embedded RF-MEMS switch for above 90 GHz applications using backside integration technique

This letter presents a D–Band (110–170 GHz) RF–MEMS based Single–Pole Double–Throw (SPDT) switch fabricated in a $0.13~\mu \text {m}$ SiGe BiCMOS technology. The on–wafer S–parameter measurements of the RF–MEMS based SPDT switch show beyond state of the art RF performances, 1.42 dB insertion loss and 54.5 dB isolation at 140 GHz. The SPDT switch consists of a tee junction connected to two Single–Pole Single–Throw (SPST) RF–MEMS switches. The RF–MEMS switch is actuated using 60 V actuation voltage and provides less than $10~\mu \text {s}$ switch–on and switch–off times. To the best of the authors’ knowledge, the results achieved in this study are the lowest insertion loss and the highest isolation of a SPDT reported in D–band.

C. Wipf

Papers

SiGe HBT technology with f T /f max of 300GHz/500GHz and 2.0 ps CML gate delay

SiGe HBT with fx/fmax of 505 GHz/720 GHz

SiGe HBT and BiCMOS process integration optimization within the DOTSEVEN project

BiCMOS embedded RF-MEMS switch for above 90 GHz applications using backside integration technique

D–Band RF–MEMS SPDT Switch in a $0.13~\mu$ m SiGe BiCMOS Technology