C
Carlo Samori
Researcher at Polytechnic University of Milan
Publications - 163
Citations - 5925
Carlo Samori is an academic researcher from Polytechnic University of Milan. The author has contributed to research in topics: Phase noise & Phase-locked loop. The author has an hindex of 34, co-authored 151 publications receiving 5381 citations. Previous affiliations of Carlo Samori include Agere Systems & Leonardo.
Papers
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Avalanche photodiodes and quenching circuits for single-photon detection
TL;DR: Avalanche photodiodes, which operate above the breakdown voltage in Geiger mode connected with avalanche-quenching circuits, can be used to detect single photons and are therefore called singlephoton avalanche diodes SPAD's.
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Analysis and design of a 1.8-GHz CMOS LC quadrature VCO
TL;DR: In this article, a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs is presented, and a simplified theoretical analysis for the oscillation frequency and phase noise displayed by the QVCO in the 1/f/sup 3/ region is developed, and good agreement is found between theory and simulation results.
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Frequency dependence on bias current in 5 GHz CMOS VCOs: impact on tuning range and flicker noise upconversion
Salvatore Levantino,Carlo Samori,Andrea Bonfanti,S.L.J. Gierkink,Andrea L. Lacaita,V. Boccuzzi +5 more
TL;DR: In this article, a first-order estimation of the tuning curve for MOS-varactor-tuned VCOs is provided, based on which a simplified phase-noise model for double cross-coupled VOCs is derived.
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A low-phase-noise 5-GHz CMOS quadrature VCO using superharmonic coupling
TL;DR: In this article, a new concept for quadrature coupling of LC oscillators is introduced and demonstrated on a 5 GHz CMOS voltage-controlled oscillator. But the technique is limited to a single oscillator and it is not suitable for a large number of oscillators.
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A 13.5-mW 5-GHz frequency synthesizer with dynamic-logic frequency divider
TL;DR: In this article, the authors proposed a frequency divider that combines the conventional and the extended true-single-phase-clock logics for multigigahertz phase-locked loops.