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Showing papers by "Chandra Mouli published in 2000"


Patent
Chandra Mouli1
10 Oct 2000
TL;DR: A shallow trench isolated integrated circuit may be formed by creating an oxidation enhancing region at the corner between a semiconductor structure surface and the trench as mentioned in this paper, where ion implantation or solid source diffusion in a way which decreases crystallographic defects.
Abstract: A shallow trench isolated integrated circuit may be formed by creating an oxidation enhancing region at the corner between a semiconductor structure surface and the trench. This region may be formed by ion implantation or solid source diffusion in a way which decreases crystallographic defects. As a result, oxidation at the trench may be enhanced without adverse effects on leakage currents. In some embodiments, the impurity laden region is formed first and the trench is etched through the region leaving an impurity laden remnant at the corner between the trench and the structure surface.

5 citations


Patent
07 Nov 2000
TL;DR: In this paper, the authors proposed a field effect transistor assembly which includes a channel region and an insulative material along the channel region, and a gate stack proximate the channel regions.
Abstract: The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a first layer of conductively doped semiconductive material and only one layer of conductive nitride. The integrated circuitry further comprises a second field effect transistor supported by the substrate. The second field effect transistor comprises a second transistor gate assembly which includes a second layer of conductively doped semiconductor material and at least two layers of conductive nitride. The invention also encompasses a field effect transistor assembly which includes a channel region and an insulative material along the channel region. The transistor assembly further includes a gate stack proximate the channel region. The gate stack includes a first conductive nitride layer separated from the channel region by the insulative material. The stack further includes a conductively doped semiconductive material proximate the first conductive nitride layer, and a second conductive nitride layer separated from the first conductive nitride layer by the conductively doped semiconductive material. Additionally, the invention encompasses methods of forming field effect transistors, and methods of forming integrated circuitry.

5 citations