scispace - formally typeset
Search or ask a question

Showing papers by "Chandra Mouli published in 2011"


Patent
31 Oct 2011
TL;DR: In this paper, a memory device and method of making the memory device are discussed. And the storage transistor comprises a body portion between first and second source/drain regions, wherein the source/drain regions are regions of a first conductivity type.
Abstract: A memory device and method of making the memory device. Memory device may include a storage transistor at a surface of a substrate. The storage transistor comprises a body portion between first and second source/drain regions, wherein the source/drain regions are regions of a first conductivity type. The storage transistor also comprises a gate structure that wraps at least partially around the body portion in at least two spatial planes. A bit line is connected to the first source/drain region and a word line is connected to the gate structure.

10 citations


Patent
03 Feb 2011
TL;DR: In this paper, a body region and a connecting region that is formed from a semiconductor with a lower band gap than the body region are shown to provide a reliable bias to the body regions for memory operations such as erasing and containment of charge.
Abstract: Memory devices are shown that include a body region and a connecting region that is formed from a semiconductor with a lower band gap than the body region. Connecting region configurations can provide increased gate induced drain leakage during an erase operation. Configurations shown can provide a reliable bias to a body region for memory operations such as erasing, and containment of charge in the body region during a boost operation.

9 citations


Patent
10 Oct 2011
TL;DR: In this paper, a movable switching element has a base disposed on a conductive pad, a body extending from the base, and an end laterally adjacent and spaced apart from the conductive contact.
Abstract: Semiconductor structures including a movable switching element having a base disposed on a conductive pad, a body extending from the base, and an end laterally adjacent and spaced apart from a conductive contact are disclosed. Upon application of a threshold voltage, the movable switching element may deform toward the conductive contact via an electrical field, establishing electrical contact between the conductive pad and the conductive contact. Various methods may be used to form such semiconductor structures, and switching devices including such semiconductor structures. Memory devices and electronic systems include such switching devices.

2 citations


Patent
Chandra Mouli1
20 Jul 2011
TL;DR: In this article, a stacked nonvolatile memory device using amorphous silicon based thin film transistors stacked vertically is described, where each layer is formed from a deposited a-Si channel region layer having a predetermined concentration of carbon to form a carbon rich silicon film or silicon carbide film, depending on the carbon content.
Abstract: A stacked non-volatile memory device uses amorphous silicon based thin film transistors stacked vertically. Each layer of transistors or cells is formed from a deposited a-Si channel region layer having a predetermined concentration of carbon to form a carbon rich silicon film or silicon carbide film, depending on the carbon content. The dielectric stack is formed over the channel region layer. In one embodiment, the dielectric stack is an ONO structure. The control gate is formed over the dielectric stack. This structure is repeated vertically to form the stacked structure. In one embodiment, the carbon content of the channel region layer is reduced for each subsequently formed layer.

2 citations


Patent
Chandra Mouli1
22 Nov 2011
TL;DR: In this paper, a memory device includes an array of memory cells and peripheral devices, and at least some of the individual memory cells include carbonated portions that contain SiC, but some of these peripheral devices do not include any carbonated portion.
Abstract: A memory device includes an array of memory cells and peripheral devices. At least some of the individual memory cells include carbonated portions that contain SiC. At least some of the peripheral devices do not include any carbonated portions. A transistor includes a first source/drain, a second source/drain, a channel including a carbonated portion of a semiconductive substrate that contains SiC between the first and second sources/drains and a gate operationally associated with opposing sides of the channel.

1 citations


Patent
02 Dec 2011
TL;DR: In this paper, a method of formation of an isolation structure for vertical semiconductor devices, the resulting isolation structure, and a memory device to prevent leakage among adjacent vertical SVC devices are described.
Abstract: A method of formation of an isolation structure for vertical semiconductor devices, the resulting isolation structure, and a memory device to prevent leakage among adjacent vertical semiconductor devices are described.


Patent
Chandra Mouli1
08 Aug 2011
TL;DR: In this article, the authors describe optical signal conduits having rare earth elements incorporated therein, such as erbium or cerium, which can be used as barrier material for optical signal transmission.
Abstract: The invention includes optical signal conduits having rare earth elements incorporated therein. The optical signal conduits can, for example, contain rare earth elements incorporated within a dielectric material matrix. For instance, erbium or cerium can be within silicon nanocrystals dispersed throughout dielectric material of optical signal conduits. The dielectric material can define a path for the optical signal, and can be wrapped in a sheath which aids in keeping the optical signal along the path. The sheath can include any suitable barrier material, and can, for example, contain one or more metallic materials. The invention also includes methods of forming optical signal conduits, with some of such methods being methods in which the optical signal conduits are formed to be part of semiconductor constructions.

Patent
Chandra Mouli1
02 Feb 2011

Patent
Chandra Mouli1
22 Nov 2011
TL;DR: In this paper, a memory device includes an array of memory cells and peripheral devices, and at least some of the individual memory cells include carbonated portions that contain SiC, but some of these peripheral devices do not include any carbonated portion.
Abstract: A memory device includes an array of memory cells and peripheral devices. At least some of the individual memory cells include carbonated portions that contain SiC. At least some of the peripheral devices do not include any carbonated portions. A transistor includes a first source/drain, a second source/drain, a channel including a carbonated portion of a semiconductive substrate that contains SiC between the first and second sources/drains and a gate operationally associated with opposing sides of the channel.