An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

We present a simple and usable noise model for the raw-data of digital imaging sensors This signal-dependent noise model, which gives the pointwise standard-deviation of the noise as a function of the expectation of the pixel raw-data output, is composed of a Poissonian part, modeling the photon sensing, and Gaussian part, for the remaining stationary disturbances in the output data We further explicitly take into account the clipping of the data (over- and under-exposure), faithfully reproducing the nonlinear response of the sensor We propose an algorithm for the fully automatic estimation of the model parameters given a single noisy image Experiments with synthetic images and with real raw-data from various sensors prove the practical applicability of the method and the accuracy of the proposed model

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Practical Poissonian-Gaussian Noise Modeling and Fitting for Single-Image Raw-Data

Systems and methods for applying time-dependent algorithmic compensation functions to data output from a continuous analyte sensor. Some embodiments determine a time since sensor implantation and/or whether a newly initialized sensor has been used previously.

Systems and methods for processing analyte sensor data

Despite their increasing sophistication, wireless sensor networks still do not exploit the most powerful of the human senses: vision. Indeed, vision provides humans with unmatched capabilities to distinguish objects and identify their importance. Our work seeks to provide sensor networks with similar capabilities by exploiting emerging, cheap, low-power and small form factor CMOS imaging technology. In fact, we can go beyond the stereo capabilities of human vision, and exploit the large scale of sensor networks to provide multiple, widely different perspectives of the physical phenomena. To this end, we have developed a small camera device called Cyclops that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts. Cyclops enables development of new class of vision applications that span across wireless sensor network. We describe our hardware and software architecture, its temporal and power characteristics and present some representative applications.

Cyclops: In Situ Image Sensing and Interpretation in Wireless Sensor Networks

Despite their increasing sophistication, wireless sensor networks still do not exploit the most powerful of the human senses: vision. Indeed, vision provides humans with unmatched capabilities to distinguish objects and identify their importance. Our work seeks to provide sensor networks with similar capabilities by exploiting emerging, cheap, low-power and small form factor CMOS imaging technology. In fact, we can go beyond the stereo capabilities of human vision, and exploit the large scale of sensor networks to provide multiple, widely different perspectives of the physical phenomena.To this end, we have developed a small camera device called Cyclops that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts. Cyclops enables development of new class of vision applications that span across wireless sensor network. We describe our hardware and software architecture, its temporal and power characteristics and present some representative applications.

http://www.kilopixel.net/publications/sensys2005.pdf

Cyclops: in situ image sensing and interpretation in wireless sensor networks

The Landau field-effect transistors have been previously investigated to lower the power dissipation of integrated circuits by reducing the subthreshold swing (SS) below the Boltzmann limit of 60 mV/dec. The basic idea is to replace the classical gate insulator with dielectrics that exhibit a negative capacitance (NC) associated with the double-well energy landscape, for example, ferroelectrics (FE), air-gap capacitors, or a combination thereof. In this article, we demonstrate that the same NC effect can also be used to achieve the devices more robust to negative-bias temperature instability (NBTI), which continues to be a major reliability challenge for scaled p-type transistors. We demonstrate that with careful design of an NC-based Landau switch, the intrinsic NBTI degradation can be fully compensated while still maintaining hysteresis-free operation and steeper slope needed for the logic switch. In fact, the parasitic capacitances in a FinFET counterintuitively make a negative capacitance field effect transistor (NCFET) more NBTI tolerant. The proposed device is validated using the numerical simulations by technologically relevant p-type SiGe FinFeTs. The results suggest the intriguing possibility that a careful, physics-informed NCFET design can simultaneously achieve reliability performance metrics.

Design Principles of Self-Compensated NBTI-Free Negative Capacitor FinFET

The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a first layer of conductively doped semiconductive material and only one layer of conductive nitride. The integrated circuitry further comprises a second field effect transistor supported by the substrate. The second field effect transistor comprises a second transistor gate assembly which includes a second layer of conductively doped semiconductor material and at least two layers of conductive nitride. The invention also encompasses a field effect transistor assembly which includes a channel region and an insulative material along the channel region. The transistor assembly further includes a gate stack proximate the channel region. The gate stack includes a first conductive nitride layer separated from the channel region by the insulative material. The stack further includes a conductively doped semiconductive material proximate the first conductive nitride layer, and a second conductive nitride layer separated from the first conductive nitride layer by the conductively doped semiconductive material. Additionally, the invention encompasses methods of forming field effect transistors, and methods of forming integrated circuitry.

Methods of forming field effect transistors and integrated circuitry including TiN gate element

This invention relates to a method and resulting structure, wherein a DRAM may be fabricated by using silicon midgap materials for transistor gate electrodes, thereby improving refresh characteristics of access transistors. The threshold voltage may be set with reduced substrate doping requirements. Current leakage is improved by this process as well.

Use of gate electrode workfunction to improve DRAM refresh

Some embodiments include memory cells that contain floating bodies and diodes. The diodes may be gated diodes having sections doped to a same conductivity type as the floating bodies, and such sections of the gated diodes may be electrically connected to the floating bodies. The floating bodies may be adjacent channel regions, and spaced from the channel regions by a dielectric structure. The dielectric structure of a memory cell may have a first portion between the floating body and the diode, and may have a second portion between the floating body and the channel region. The first portion may be more leaky to charge carriers than the second portion. The diodes may be formed in semiconductor material that is different from a semiconductor material that the channel regions are in. The floating bodies may have bulbous lower regions. Some embodiments include methods of making memory cells.

Memory cells, and methods of forming memory cells

Reduction of electrical parameter variation is essential to achieve high yield and reliability in semiconductor devices. However, variation depends on a large number of process factors, which are often interdependent. In this work, well-calibrated Technology Computer-Aided-Design process and device simulations were performed in a designed experiment to develop an efficient, surrogate response surface model (RSM) of the device parameters as a function of key process factors. Monte Carlo simulations were performed with the RSM to estimate variation and design systems to reduce variation. The approach, illustrated here specifically for peripheral n-type field-effect transistors in a dynamic random-access-memory process flow, is general, easy-to-implement, and a cost-effective way to systematically identify, model, and analyze process variation.

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Chandra Mouli

Papers

Design Principles of Self-Compensated NBTI-Free Negative Capacitor FinFET

Methods of forming field effect transistors and integrated circuitry including TiN gate element

Use of gate electrode workfunction to improve DRAM refresh

Memory cells, and methods of forming memory cells

Using TCAD, Response Surface Model and Monte Carlo Methods to Model Processes and Reduce Device Variation