An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

We present a simple and usable noise model for the raw-data of digital imaging sensors This signal-dependent noise model, which gives the pointwise standard-deviation of the noise as a function of the expectation of the pixel raw-data output, is composed of a Poissonian part, modeling the photon sensing, and Gaussian part, for the remaining stationary disturbances in the output data We further explicitly take into account the clipping of the data (over- and under-exposure), faithfully reproducing the nonlinear response of the sensor We propose an algorithm for the fully automatic estimation of the model parameters given a single noisy image Experiments with synthetic images and with real raw-data from various sensors prove the practical applicability of the method and the accuracy of the proposed model

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Practical Poissonian-Gaussian Noise Modeling and Fitting for Single-Image Raw-Data

Systems and methods for applying time-dependent algorithmic compensation functions to data output from a continuous analyte sensor. Some embodiments determine a time since sensor implantation and/or whether a newly initialized sensor has been used previously.

Systems and methods for processing analyte sensor data

Despite their increasing sophistication, wireless sensor networks still do not exploit the most powerful of the human senses: vision. Indeed, vision provides humans with unmatched capabilities to distinguish objects and identify their importance. Our work seeks to provide sensor networks with similar capabilities by exploiting emerging, cheap, low-power and small form factor CMOS imaging technology. In fact, we can go beyond the stereo capabilities of human vision, and exploit the large scale of sensor networks to provide multiple, widely different perspectives of the physical phenomena. To this end, we have developed a small camera device called Cyclops that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts. Cyclops enables development of new class of vision applications that span across wireless sensor network. We describe our hardware and software architecture, its temporal and power characteristics and present some representative applications.

Cyclops: In Situ Image Sensing and Interpretation in Wireless Sensor Networks

Despite their increasing sophistication, wireless sensor networks still do not exploit the most powerful of the human senses: vision. Indeed, vision provides humans with unmatched capabilities to distinguish objects and identify their importance. Our work seeks to provide sensor networks with similar capabilities by exploiting emerging, cheap, low-power and small form factor CMOS imaging technology. In fact, we can go beyond the stereo capabilities of human vision, and exploit the large scale of sensor networks to provide multiple, widely different perspectives of the physical phenomena.To this end, we have developed a small camera device called Cyclops that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts. Cyclops enables development of new class of vision applications that span across wireless sensor network. We describe our hardware and software architecture, its temporal and power characteristics and present some representative applications.

http://www.kilopixel.net/publications/sensys2005.pdf

Cyclops: in situ image sensing and interpretation in wireless sensor networks

Semiconductor structures including a movable switching element having a base disposed on a conductive pad, a body extending from the base, and an end laterally adjacent and spaced apart from a conductive contact are disclosed. Upon application of a threshold voltage, the movable switching element may deform toward the conductive contact via an electrical field, establishing electrical contact between the conductive pad and the conductive contact. Various methods may be used to form such semiconductor structures, and switching devices including such semiconductor structures. Memory devices and electronic systems include such switching devices.

Methods of forming semiconductor structures including a movable switching element

A stacked non-volatile memory device uses amorphous silicon based thin film transistors stacked vertically. Each layer of transistors or cells is formed from a deposited a-Si channel region layer having a predetermined concentration of carbon to form a carbon rich silicon film or silicon carbide film, depending on the carbon content. The dielectric stack is formed over the channel region layer. In one embodiment, the dielectric stack is an ONO structure. The control gate is formed over the dielectric stack. This structure is repeated vertically to form the stacked structure. In one embodiment, the carbon content of the channel region layer is reduced for each subsequently formed layer.

Method for fabricating stacked non-volatile memory with silicon carbide-based amorphous silicon thin film transistors

A capacitor-less floating-body memory cell, memory device, system and process of forming the capacitor-less memory cell includes forming the memory cell (82) in a active area of a substantially physically isolated portion of the bulk semiconductor substrate (10). A pass transistor (70) is formed on the active area for coupling with a word line (88). The capacitor-less memory cell further includes a read/write enable transistor (76) vertically configurated along at least one vertical side of the active area, sharing a floating source/drain region (80) with the pass transistor, and operable during a reading of a logic state with the logic state being stored as charge in a floating body area of the active area, causing different determinable threshold voltages for the pass transistor.

Capacitor-less floating-body volatile memory cell comprising a pass transistor and a vertical read/write enable transistor and manufacturing and programming methods thereof

Memory devices and electronic systems include an array of vertical memory cells positioned along respective vertical channels to define vertical memory strings. Each of the vertical channels includes a channel material exhibiting an electron mobility of at least about 30 cm2/(V·s) and a room temperature band gap of at least about 1.40 eV (e.g., zinc oxide, silicon carbide, indium phosphide, indium gallium zinc oxide, gallium arsenide, or molybdenum disulfide) and a bottom plug material exhibiting a room temperature band gap of less than about 1.10 eV (e.g., silicon germanium, germanium, or indium gallium arsenide). Methods of fabricating a memory device include forming such a bottom plug material within vertical channels and forming such a channel material electrically coupled to the bottom plug material.

Memory devices including vertical memory cells and related methods

The retention time characteristics in DRAM cells are strongly influenced by various leakage mechanisms near the storage node junction. In this work, we present a full three-dimensional analysis of stress distributions in and around the active area of high-density memory cells. We use a combination of high-resolution metrology analysis and 3D numerical modeling to provide quantitative estimates. Since shallow - trench isolation (STI) process used in high-density cells is one of the major contributors to stress, we study the effects of various materials used to fill the trench. Our electron diffraction contrast (EDC) methodology provides a spatial resolution on the order of 10 nm with sensitivity on of the order of tens of MPa and therefore useful for the analysis of scaled high density memory cells.

/pdf/three-dimensional-characterization-and-modeling-of-stress-32fj0ixck0.pdf

Chandra Mouli

Papers

Methods of forming semiconductor structures including a movable switching element

Method for fabricating stacked non-volatile memory with silicon carbide-based amorphous silicon thin film transistors

Capacitor-less floating-body volatile memory cell comprising a pass transistor and a vertical read/write enable transistor and manufacturing and programming methods thereof

Memory devices including vertical memory cells and related methods

Three-Dimensional Characterization and Modeling of Stress Distribution in High-Density DRAM Memory Cells