An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

We present a simple and usable noise model for the raw-data of digital imaging sensors This signal-dependent noise model, which gives the pointwise standard-deviation of the noise as a function of the expectation of the pixel raw-data output, is composed of a Poissonian part, modeling the photon sensing, and Gaussian part, for the remaining stationary disturbances in the output data We further explicitly take into account the clipping of the data (over- and under-exposure), faithfully reproducing the nonlinear response of the sensor We propose an algorithm for the fully automatic estimation of the model parameters given a single noisy image Experiments with synthetic images and with real raw-data from various sensors prove the practical applicability of the method and the accuracy of the proposed model

/pdf/practical-poissonian-gaussian-noise-modeling-and-fitting-for-4cn04dppj4.pdf

Practical Poissonian-Gaussian Noise Modeling and Fitting for Single-Image Raw-Data

Systems and methods for applying time-dependent algorithmic compensation functions to data output from a continuous analyte sensor. Some embodiments determine a time since sensor implantation and/or whether a newly initialized sensor has been used previously.

Systems and methods for processing analyte sensor data

Despite their increasing sophistication, wireless sensor networks still do not exploit the most powerful of the human senses: vision. Indeed, vision provides humans with unmatched capabilities to distinguish objects and identify their importance. Our work seeks to provide sensor networks with similar capabilities by exploiting emerging, cheap, low-power and small form factor CMOS imaging technology. In fact, we can go beyond the stereo capabilities of human vision, and exploit the large scale of sensor networks to provide multiple, widely different perspectives of the physical phenomena. To this end, we have developed a small camera device called Cyclops that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts. Cyclops enables development of new class of vision applications that span across wireless sensor network. We describe our hardware and software architecture, its temporal and power characteristics and present some representative applications.

Cyclops: In Situ Image Sensing and Interpretation in Wireless Sensor Networks

Despite their increasing sophistication, wireless sensor networks still do not exploit the most powerful of the human senses: vision. Indeed, vision provides humans with unmatched capabilities to distinguish objects and identify their importance. Our work seeks to provide sensor networks with similar capabilities by exploiting emerging, cheap, low-power and small form factor CMOS imaging technology. In fact, we can go beyond the stereo capabilities of human vision, and exploit the large scale of sensor networks to provide multiple, widely different perspectives of the physical phenomena.To this end, we have developed a small camera device called Cyclops that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts. Cyclops enables development of new class of vision applications that span across wireless sensor network. We describe our hardware and software architecture, its temporal and power characteristics and present some representative applications.

http://www.kilopixel.net/publications/sensys2005.pdf

Cyclops: in situ image sensing and interpretation in wireless sensor networks

Semiconductor devices include one or more transistors having a floating gate and a control gate. In at least one embodiment, the floating gate comprises an intermediate portion extending between two end portions. The intermediate portion has an average cross-sectional area less than one or both of the end portions. In some embodiments, the intermediate portion may comprise a single nanowire. In additional embodiments, semiconductor devices have one or more transistors having a control gate and a floating gate in which a surface of the control gate opposes a lateral side surface of a floating gate that defines a recess in the floating gate. Electronic systems include such semiconductor devices. Methods of forming semiconductor devices include, for example, forming a floating gate having an intermediate portion extending between two end portions, and configuring the intermediate portion to have an average cross-sectional area less than one or both of the end portions.

Semiconductor devices and electronic systems comprising floating gate transistors

Devices and methods for providing JFET transistors with improved operating characteristics are provided. Specifically, one or more embodiments of the present invention relate to JFET transistors with a higher diode turn-on voltage. For example, one or more embodiments include a JFET with a PIN gate stack. One or more embodiments also relate to systems and devices in which the improved JFET may be employed, as well as methods of manufacturing the improved JFET.

JFET Devices with PIN Gate Stacks and Methods of Making the Same

PROBLEM TO BE SOLVED: To provide an isolation method and apparatus for isolating the regions of a semiconductor apparatus SOLUTION: The isolation structure and method include forming a biased gate over a field isolation region and adjacent a pixel of an image sensor The isolation method also includes forming of an isolation gate over substantial portions of a field isolation region to isolate pixels in an array of pixels The isolation method and apparatus further include forming of an isolation trench in an active region and filling the trench with a doped conductive material containing silicon There is also provided a method and structure for isolating the regions by providing a trench in an active area of a substrate, growing an epitaxial layer in the trench to completely fill the trench or to partially fill the trench, and depositing an insulating material over the epitaxial layer and within the trench, to completely fill the trench COPYRIGHT: (C)2006,JPO&NCIPI

Structure for isolating regions, image sensor, and manufacturing method therefor

This invention includes methods of forming integrated circuits, and includes DRAM circuitry memory cells. In one implementation, a method of forming an integrated circuit includes forming a trench isolation mask over a semiconductor substrate. The trench isolation mask defines an active area region and a trench isolation region. An ion implantion is conducted into semiconductive material of the substrate to form a buried region within active area of the substrate. The buried region has a first edge received proximate an edge of the trench isolation region. Using the trench isolation mask, etching is conducted into semiconductive material of the substrate to form an isolation trench. After the ion implantation and after forming the isolation trench, insulative material is formed within the buried region and insulative material is deposited to within the isolation trench. The insulative material received within the isolation trench joins with the insulative material formed within the buried region.

Methods of forming integrated circuits, and DRAM circuitry memory cells

Emerging Memory (EM) is a broad class of memory devices leveraging a wide spectrum of physical phenomena and/or material properties, that go beyond the charge storage concept of more conventional NAND and DRAM technologies. Availability of physical models and simulation tools to understand their behavior, predict performance, engineer materials and cell architecture would be extremely useful for their successful development. However, such tools are not always available because of the diversity and complexity of the physical mechanisms. This paper would like to review the main trends of the on-going modeling and simulation activities in the field of EM, trying to point out what are the needs and challenges for the future.

Chandra Mouli

Papers

Semiconductor devices and electronic systems comprising floating gate transistors

JFET Devices with PIN Gate Stacks and Methods of Making the Same

Structure for isolating regions, image sensor, and manufacturing method therefor

Methods of forming integrated circuits, and DRAM circuitry memory cells

Emerging Memory Modeling Challenges (Invited Paper)