scispace - formally typeset
Search or ask a question
Author

Chandra Mouli

Other affiliations: Aptina
Bio: Chandra Mouli is an academic researcher from Micron Technology. The author has contributed to research in topics: Transistor & Field-effect transistor. The author has an hindex of 32, co-authored 216 publications receiving 3289 citations. Previous affiliations of Chandra Mouli include Aptina.


Papers
More filters
Patent
Chandra Mouli1
25 Sep 2015
TL;DR: In this article, the memory arrays may contain vertical stacks of memory unit cells, with individual unit cells containing cross-point memory and at least one diode, and the diodes may be placed between the bitlines and the memory elements.
Abstract: Some embodiments include vertical stacks of memory units, with individual memory units each having a memory element, a wordline, a bitline and at least one diode. The memory units may correspond to cross-point memory, and the diodes may correspond to band-gap engineered diodes containing two or more dielectric layers sandwiched between metal layers. Tunneling properties of the dielectric materials and carrier injection properties of the metals may be tailored to engineer desired properties into the diodes. The diodes may be placed between the bitlines and the memory elements, or may be placed between the wordlines and memory elements. Some embodiments include methods of forming cross-point memory arrays. The memory arrays may contain vertical stacks of memory unit cells, with individual unit cells containing cross-point memory and at least one diode.
Patent
14 May 2010
TL;DR: In this paper, a transistor comprises a vertical semiconductor material mesa (120) upstanding from a semiconductor base (555) that forms a conductive channel between first and second doped regions (130, 140).
Abstract: A transistor comprises a vertical semiconductor material mesa (120) upstanding from a semiconductor base (555) that forms a conductive channel between first and second doped regions (130, 140). The first doped region (130) is electrically coupled to one or more first suicide layers (252) on the surface of the base. The second doped region (140) is electrically coupled to a second silicide layer (251) on the upper surface of the mesa. A gate conductor (350) is provided on one or more sidewalls of the mesa. A resistive memory array (300) comprising such transistors and memory cells (220) on top thereof is also disclosed.
Patent
26 Apr 2002
TL;DR: In this article, a DRAM array with a structure consisting of a first material separated from a second material by an intervening insulative material is described. But the structure is not described.
Abstract: The invention includes a DRAM array having a structure therein which includes a first material separated from a second material by an intervening insulative material. The first material is doped to at least 1×10 17 atoms/cm 3 with n-type and p-type dopant. The invention also includes a semiconductor construction in which a doped material is over a segment of a substrate. The doped material has a first type majority dopant therein, and is electrically connected with an electrical ground. A pair of conductively-doped diffusion regions are adjacent the segment, and spaced from one another by at least a portion of the segment. The conductively-doped diffusion regions have a second type majority dopant therein. The invention also encompasses methods of forming semiconductor constructions.
Patent
Chandra Mouli1
14 Feb 2012
TL;DR: In this paper, the authors describe memory cells that contain floating bodies and gated diodes, where the floating bodies may be adjacent channel regions, and spaced from the channel regions by a dielectric structure.
Abstract: Some embodiments include memory cells that contain floating bodies and diodes. The diodes may be gated diodes having sections doped to a same conductivity type as the floating bodies, and such sections of the gated diodes may be electrically connected to the floating bodies. The floating bodies may be adjacent channel regions, and spaced from the channel regions by a dielectric structure. The dielectric structure of a memory cell may have a first portion between the floating body and the diode, and may have a second portion between the floating body and the channel region. The first portion may be more leaky to charge carriers than the second portion. The diodes may be formed in semiconductor material that is different from a semiconductor material that the channel regions are in. The floating bodies may have bulbous lower regions. Some embodiments include methods of making memory cells.

Cited by
More filters
Patent
01 Aug 2008
TL;DR: In this article, the oxide semiconductor film has at least a crystallized region in a channel region, which is defined as a region of interest (ROI) for a semiconductor device.
Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

1,501 citations

Journal ArticleDOI
TL;DR: A signal-dependent noise model, which gives the pointwise standard-deviation of the noise as a function of the expectation of the pixel raw-data output, is composed of a Poissonian part, modeling the photon sensing, and Gaussian part, for the remaining stationary disturbances in the output data.
Abstract: We present a simple and usable noise model for the raw-data of digital imaging sensors This signal-dependent noise model, which gives the pointwise standard-deviation of the noise as a function of the expectation of the pixel raw-data output, is composed of a Poissonian part, modeling the photon sensing, and Gaussian part, for the remaining stationary disturbances in the output data We further explicitly take into account the clipping of the data (over- and under-exposure), faithfully reproducing the nonlinear response of the sensor We propose an algorithm for the fully automatic estimation of the model parameters given a single noisy image Experiments with synthetic images and with real raw-data from various sensors prove the practical applicability of the method and the accuracy of the proposed model

789 citations

Patent
01 Sep 2006
TL;DR: In this paper, a time-dependent algorithmic compensation function is applied to data output from a continuous analyte sensor to determine a time since sensor implantation and/or whether a newly initialized sensor has been used previously.
Abstract: Systems and methods for applying time-dependent algorithmic compensation functions to data output from a continuous analyte sensor. Some embodiments determine a time since sensor implantation and/or whether a newly initialized sensor has been used previously.

690 citations

Journal Article
TL;DR: A small camera device called Cyclops is developed that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts.
Abstract: Despite their increasing sophistication, wireless sensor networks still do not exploit the most powerful of the human senses: vision. Indeed, vision provides humans with unmatched capabilities to distinguish objects and identify their importance. Our work seeks to provide sensor networks with similar capabilities by exploiting emerging, cheap, low-power and small form factor CMOS imaging technology. In fact, we can go beyond the stereo capabilities of human vision, and exploit the large scale of sensor networks to provide multiple, widely different perspectives of the physical phenomena. To this end, we have developed a small camera device called Cyclops that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts. Cyclops enables development of new class of vision applications that span across wireless sensor network. We describe our hardware and software architecture, its temporal and power characteristics and present some representative applications.

514 citations

Proceedings ArticleDOI
02 Nov 2005
TL;DR: Cyclops as discussed by the authors is a small camera device that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts.
Abstract: Despite their increasing sophistication, wireless sensor networks still do not exploit the most powerful of the human senses: vision. Indeed, vision provides humans with unmatched capabilities to distinguish objects and identify their importance. Our work seeks to provide sensor networks with similar capabilities by exploiting emerging, cheap, low-power and small form factor CMOS imaging technology. In fact, we can go beyond the stereo capabilities of human vision, and exploit the large scale of sensor networks to provide multiple, widely different perspectives of the physical phenomena.To this end, we have developed a small camera device called Cyclops that bridges the gap between the computationally constrained wireless sensor nodes such as Motes, and CMOS imagers which, while low power and inexpensive, are nevertheless designed to mate with resource-rich hosts. Cyclops enables development of new class of vision applications that span across wireless sensor network. We describe our hardware and software architecture, its temporal and power characteristics and present some representative applications.

489 citations