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Chandra Mouli

Researcher at Micron Technology

Publications -  216
Citations -  3356

Chandra Mouli is an academic researcher from Micron Technology. The author has contributed to research in topics: Transistor & Field-effect transistor. The author has an hindex of 32, co-authored 216 publications receiving 3289 citations. Previous affiliations of Chandra Mouli include Aptina.

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Patent

Low dark current image sensors with epitaxial SiC and/or carbonated channels for array transistors

TL;DR: In this article, a pixel cell having a substrate with a isolation channel formed of higher carbon concentrate such as SiC or carbonated silicon is provided over the substrate of the pixel cell to reduce the dark current leakage.
Patent

Selectively Conducting Devices, Diode Constructions, Constructions, and Diode Forming Methods

TL;DR: In this article, the dielectric material may be configured to conduct current from the first electrode to the second electrode when a first voltage is applied across the first and second electrodes.
Patent

Memory devices, memory device constructions, constructions, memory device forming methods, current conducting devices, and memory cell programming methods

TL;DR: In this article, the authors present a memory device having a wordline, a bitline, memory element selectively configurable in one or more different resistive states, and a diode configured to allow a current to flow from the wordline through the memory element to the bitline responsive to a voltage being applied across the wordlines and the bitlines and to decrease the current if the voltage is increased or decreased.
Patent

Raised photodiode sensor to increase fill factor and quantum efficiency in scaled pixels

TL;DR: In this article, an image pixel cell with a doped, hydrogenated amorphous silicon photosensor, raised above the surface of a substrate is provided, and methods of forming the raised photosensor are also disclosed.
Patent

1T/0C RAM cell with a wrapped-around gate device structure

Chandra Mouli
TL;DR: In this paper, a memory device consisting of a storage transistor at a surface of a substrate comprising a body portion between first and second source/drain regions, wherein the source and drain regions are regions of a first conductivity type.