C
Charles E. Stroud
Researcher at Auburn University
Publications - 149
Citations - 3993
Charles E. Stroud is an academic researcher from Auburn University. The author has contributed to research in topics: Field-programmable gate array & Programmable logic device. The author has an hindex of 36, co-authored 149 publications receiving 3958 citations. Previous affiliations of Charles E. Stroud include Lattice Semiconductor & AT&T Corporation.
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A Designer’s Guide to Built-In Self-Test
TL;DR: In this article, the authors present an overview of BIST for FPGAs and CPLDs, and apply it to Mixed-Signal Systems (MSSs) for fault detection.
Proceedings ArticleDOI
Built-in self-test of FPGA interconnect
TL;DR: The first BIST approach for testing the programmable routing network in FPGAs is introduced, which detects opens in, and shorts among, wiring segments, and also faults affecting theprogrammable switches that configure the FPGA interconnect.
Proceedings ArticleDOI
Built-in self-test of logic blocks in FPGAs (Finally, a free lunch: BIST without overhead!)
TL;DR: A new approach for Field Programmable Gate Array (FPGA) testing is presented that exploits the reprogrammability of FPGAs to create Built-In Self-Test (BIST) logic only during off-line test, achieving BIST without any area overhead or performance penalties to the system function implemented by the FPGA.
Proceedings ArticleDOI
Dynamic fault tolerance in FPGAs via partial reconfiguration
TL;DR: On-line, multi-level fault tolerant (FT) technique for system functions and applications mapped to partially and dynamically reconfigurable FPGAs based on the roving self testing areas (STARs) fault detection/location strategy.
Proceedings Article
BIST-based test and diagnosis of FPGA logic blocks : Reconfigurable and Adaptive VLSI Systems
TL;DR: This work introduces the first diagnosis method for multiple faulty PLBs; for any faulty PLB, it is introduced its internal faulty modules or modes of operation and provides the basis for both failure analysis used for yield improvement and for any repair strategy used for fault-tolerance in reconfigurable systems.