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Chen Wei-Tsung

Bio: Chen Wei-Tsung is an academic researcher from National Chiao Tung University. The author has contributed to research in topics: Thin-film transistor & Layer (electronics). The author has an hindex of 8, co-authored 20 publications receiving 705 citations.

Papers
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Journal ArticleDOI
TL;DR: In this article, the electrical and reliability properties of ultrathin La/sub 2/O/sub 3/ gate dielectric have been investigated and the measured capacitance of 33 /spl Aring/La/sub 1/2O/Sub 3/3/ gate is 7.2 /spl mu/F/cm/sup 2/ that gives an effective K value of 27 and an equivalent oxide thickness of 4.8 /spl aring.
Abstract: Electrical and reliability properties of ultrathin La/sub 2/O/sub 3/ gate dielectric have been investigated. The measured capacitance of 33 /spl Aring/ La/sub 2/O/sub 3/ gate dielectric is 7.2 /spl mu/F/cm/sup 2/ that gives an effective K value of 27 and an equivalent oxide thickness of 4.8 /spl Aring/. Good dielectric integrity is evidenced from the low leakage current density of 0.06 A/cm/sup 2/ at -1 V, high effective breakdown field of 13.5 MV/cm, low interface-trap density of 3/spl times/10/sup 10/ eV/sup -1//cm/sup 2/, and excellent reliability with more than 10 years lifetime even at 2 V bias. In addition to high K, these dielectric properties are very close to conventional thermal SiO/sub 2/.

202 citations

Journal ArticleDOI
TL;DR: In this article, the authors discuss the reason for the instability of amorphous indium-gallium-zincoxide (a-IGZO) thin-film transistors (TFTs) under both positive and negative bias stresses.
Abstract: This letter discusses the reason for the instability of amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) under both positive and negative bias stresses. This instability is significantly influenced by the oxygen content in the bulk IGZO and the surrounding environment. The as-fabricated low-temperature devices can only endure a single polarized bias stress. An a-IGZO TFT that is stable toward both positive and negative bias stresses with large relaxation times of 95 × 104 and 371 × 104 s, respectively, is achieved by annealing and passivation.

156 citations

Proceedings ArticleDOI
13 Jun 2000
TL;DR: In this article, high quality La/sub 2/O/sub 3/ and Al/sub O/Sub 3/ are fabricated with EOT of 4.8 and 9.6 /spl Aring/, leakage current of 0.06 and 0.4 A/cm/sup -2/ and D/sub it/ of both 3/spl times/10/sup 10/ eV/sup 2/ respectively.
Abstract: High quality La/sub 2/O/sub 3/ and Al/sub 2/O/sub 3/ are fabricated with EOT of 4.8 and 9.6 /spl Aring/, leakage current of 0.06 and 0.4 A/cm/sup -2/ and D/sub it/ of both 3/spl times/10/sup 10/ eV/sup -1//cm/sup 2/, respectively. The high K is further evidenced from high MOSFET's I/sub d/ and g/sub m/ with low I/sub OFF/. Good SILC and Q/sub BD/ are obtained and comparable with SiO/sub 2/. The low EOT is due to the high thermodynamic stability in contact with Si and stable after H/sub 2/ annealing up to 550/spl deg/C.

92 citations

Journal ArticleDOI
TL;DR: In this article, a floating dual gate (FDG) indium-gallium-zincoxide (IGZO) thin film transistor with a floating metal back gate that is directly contact with IGZO without a dielectric layer was proposed.
Abstract: In this study, we propose a floating dual gate (FDG) indium-gallium-zinc-oxide (IGZO) thin film transistor (TFT) with a floating metal back gate that is directly contact with IGZO without a dielectric layer. The floating back gate effect is investigated by changing the work function (ϕ) of the back gate. The FDG IGZO TFT exhibits an improved field-effect mobility (μ), unchanged subthreshold swing (SS), high on/off current ratio, and a tunable threshold voltage ranged (Vth) from −5.0 to +7.9 V without an additional back gate power supply.

87 citations

Journal ArticleDOI
TL;DR: In this paper, a real-time visible-light phototransistor comprised of a wideband-gap amorphous indium-gallium-zincoxide (a-IGZO) thin-film transistor (TFT) and a narrow-bandgap polymeric capping layer was demonstrated.
Abstract: This work demonstrates a real-time visible-light phototransistor comprised of a wide-band-gap amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) and a narrow-band-gap polymeric capping layer. The capping layer and the IGZO layer form a p-n junction diode. The p-n junction absorbs visible light and consequently injects electrons into the IGZO layer, which in turn affects the body voltage as well as the threshold voltage of a-IGZO TFT. The hysteresis behavior due to the charges at IGZO back interface is also discussed.

84 citations


Cited by
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Journal ArticleDOI
TL;DR: In this article, a review of the development of high-k gate oxides such as hafnium oxide (HFO) and high-K oxides is presented, with the focus on the work function control in metal gate electrodes.
Abstract: The scaling of complementary metal oxide semiconductor transistors has led to the silicon dioxide layer, used as a gate dielectric, being so thin (14?nm) that its leakage current is too large It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (?) or 'high K' gate oxides such as hafnium oxide and hafnium silicate These oxides had not been extensively studied like SiO2, and they were found to have inferior properties compared with SiO2, such as a tendency to crystallize and a high density of electronic defects Intensive research was needed to develop these oxides as high quality electronic materials This review covers both scientific and technological issues?the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure and reactions, their electronic structure, bonding, band offsets, electronic defects, charge trapping and conduction mechanisms, mobility degradation and flat band voltage shifts The oxygen vacancy is the dominant electron trap It is turning out that the oxides must be implemented in conjunction with metal gate electrodes, the development of which is further behind Issues about work function control in metal gate electrodes are discussed

1,520 citations

Journal ArticleDOI
TL;DR: In this article, the choice of oxides, their structural and metallurgical behaviour, atomic diffusion, their deposition, interface structure and reactions, their electronic structure, bonding, band offsets, mobility degradation, flat band voltage shifts and electronic defects are discussed.
Abstract: The scaling of complementary metal oxide semiconductor (CMOS) transistors has led to the silicon dioxide layer used as a gate dielectric becoming so thin (1.4 nm) that its leakage current is too large. It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (κ) or 'high K' gate oxides such as hafnium oxide and hafnium silicate. Little was known about such oxides, and it was soon found that in many respects they have inferior electronic properties to SiO2 ,s uch as a tendency to crystallise and a high concentration of electronic defects. Intensive research is underway to develop these oxides into new high quality electronic materials. This review covers the choice of oxides, their structural and metallurgical behaviour, atomic diffusion, their deposition, interface structure and reactions, their electronic structure, bonding, band offsets, mobility degradation, flat band voltage shifts and electronic defects. The use of high K oxides in capacitors of dynamic random access memories is also covered.

1,500 citations

Journal ArticleDOI
TL;DR: This review summarizes and analyzes recent advances in materials concepts as well as in thin-film fabrication techniques for high- k gate dielectrics when integrated with FSE-compatible semiconductors such as organics, metal oxides, quantum dot arrays, carbon nanotubes, graphene, and other 2D semiconductor types.
Abstract: Recent advances in flexible and stretchable electronics (FSE), a technology diverging from the conventional rigid silicon technology, have stimulated fundamental scientific and technological research efforts. FSE aims at enabling disruptive applications such as flexible displays, wearable sensors, printed RFID tags on packaging, electronics on skin/organs, and Internet-of-things as well as possibly reducing the cost of electronic device fabrication. Thus, the key materials components of electronics, the semiconductor, the dielectric, and the conductor as well as the passive (substrate, planarization, passivation, and encapsulation layers) must exhibit electrical performance and mechanical properties compatible with FSE components and products. In this review, we summarize and analyze recent advances in materials concepts as well as in thin-film fabrication techniques for high-k (or high-capacitance) gate dielectrics when integrated with FSE-compatible semiconductors such as organics, metal oxides, quantum...

459 citations

Patent
24 Jun 2003
TL;DR: In this article, the dielectric can be formed as a nanolaminate of hafnium oxide and a lanthanide oxide, where the layer of the hafium oxide is adjacent and in contact with the surface of the lanthanides.
Abstract: Dielectric layers containing an atomic layer deposited hafnium oxide and an electron beam evaporated lanthanide oxide and a method of fabricating such a dielectric layer produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO 2 . Forming a layer of hafnium oxide by atomic layer deposition and forming a layer of a lanthanide oxide by electron beam evaporation, where the layer of hafnium oxide is adjacent and in contact with the layer of lanthanide, provides a dielectric layer with a relatively high dielectric constant as compared with silicon oxide. The dielectric can be formed as a nanolaminate of hafnium oxide and a lanthanide oxide.

304 citations

Patent
30 Aug 2004
TL;DR: A method for growing films for use in integrated circuits using atomic layer deposition and a subsequent converting step is described in this article, where a metal atomic layer is oxidized to form a metal oxide layer.
Abstract: A method for growing films for use in integrated circuits using atomic layer deposition and a subsequent converting step is described. In an embodiment, the subsequent converting step includes oxidizing a metal atomic layer to form a metal oxide layer. The atomic layer deposition and oxidation step are then repeated to produce a metal oxide layer having sufficient thickness for use as a metal oxide layer in an integrated circuit. The subsequent converting step, in an embodiment, includes converting the atomic deposition layer by exposing it to one of nitrogen to form a nitride layer, carbon to form a carbide layer, boron to form a boride layer, and fluorine to form a fluoride layer. Systems and devices for performing the method, semiconductor devices so produced, and machine readable media containing the method are also described.

290 citations