Chenming Hu

Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.

Hybrid Si/TMD 2D electronic double channels fabricated using solid CVD few-layer-MoS2 stacking for V th matching and CMOS-compatible 3DFETs

Abstract: Stackable 3DFETs such as FinFET using hybrid Si/MoS 2 channels were developed using a fully CMOS-compatible process. Adding several molecular layers (3–16 layers) of the transition-metal dichalcogenide (TMD), MoS 2 to Si fin and nanowire resulted in improved (+25%) I on,n of the FinFET and nanowire FET (NWFET). The PFETs also operated effectively and the N/P device V th are low and matched perfectly. The proposed heterogeneous Si/TMD 3DFETs can be useful in future electronics.

Compact modeling of flicker noise variability in small size MOSFETs

Abstract: A compact model has been developed to capture the variability of flicker noise resulting from the reduction in size of state of the art MOSFETs The underlying physics of flicker noise in small area MOSFETs has been verified by two means: Monte Carlo simulation and analytic modeling The statistical distribution of flicker noise is reported for the first time, supported by experimental data from two sets of devices with different areas The developed model is capable of predicting the area dependence of noise at any frequency at desired %Yield

Quasi-planar NMOS FinFETs with sub-100 nm gate lengths

Abstract: Double-gate MOSFETs alleviate short channel effects and allow for more aggressive device scaling. Simulations have shown that scaling double-gated devices can reach 10 nm. In the past, process complexity has prevented serious development of a scalable double-gate device. In 1998, Hisarnoto et al. introduced a FinFET process that provided a method of fabricating devices with promising performance and scalability. Using a single poly layer across a silicon fin to form both gates in the double-gate structure, the FinFET benefits from having equally-sized, self-aligned gates. In this work, we have revamped the FinFET process flow to make it simpler. This improved process flow still has the self-aligned, double-gate advantage without suffering from extra gate-to-drain overlap capacitance.

Absorption processes associated with anti‐Stokes fluorescence in rhodamine B solutions

Abstract: The absorption coefficient of several rhodamine B solutions excited at 632.8 nm has been measured for temperatures ranging from 200 to 385 °K. The weak monomer absorption coefficient (∼ 10−5 times the peak coefficient) at this anti‐Stokes excitation wavelength facilitates a study of the other components of absorption in the dye solution, yielding valuable information on solvent effects and factors affecting the quantum efficiency of fluorescence, such as dimer absorption, impurity content, etc. Whereas at high temperatures (above 30 °C), linear singlet‐singlet monomer absorption is observed to dominate, dimer formation is evident at temperatures below 30 °C, and the impurity absorption appears negligible in either case. From a least‐squares fit of the experimental data with the theoretical dependence of the total (monomer and dimer) absorption upon temperature, the association energy for the dimer is found to be 5.0 kcal/mole. It also seems possible that at temperatures above 50 °C, for solutions with low...

Capacitance Modeling in III–V FinFETs

Abstract: We present a physics-based model of charge density and capacitance for III–V channel double-gate nMOSFETs. The developed model accurately accounts for the impact of quantum capacitance on gate capacitance with applied gate voltage including the steplike behavior with sub-band population. The presented model is in excellent agreement with the self-consistent Schrodinger–Poisson simulation data of InGaAs channel double-gate MOSFET.

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

疟原虫var基因转换速率变化导致抗原变异[英]／Paul H, Robert P, Christodoulou Z, et al//Proc Natl Acad Sci U S A

Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1（PfPMP1）与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用，在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员，通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

High-κ gate dielectrics: Current status and materials properties considerations

Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

Design of Analog CMOS Integrated Circuits

Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

Prospects of Colloidal Nanocrystals for Electronic and Optoelectronic Applications

Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389