Chenming Hu

Bio: Chenming Hu is an academic researcher from University of California, Berkeley. The author has contributed to research in topics: MOSFET & Gate oxide. The author has an hindex of 119, co-authored 1296 publications receiving 57264 citations. Previous affiliations of Chenming Hu include Motorola & National Chiao Tung University.

Hot-carrier degradation in bipolar transistors at 300 and 110 K-effect on BiCMOS inverter performance

Abstract: The degradation of bipolar transistors at 300 and 110 K under DC base-emitter reverse-bias stress is discussed. It is found that, for the same reverse voltage, the reverse current is about three to four times smaller at 100 than at 300 K, but the rate of base current degradation is several times larger. A method for modeling the degradation due to the stress from a periodic signal is proposed. The resulting expression for degradation is compatible with the SPICE bipolar model and has been used to simulate the degradation of a BiCMOS inverter operating at 300 and 110 K. >

Hot-carrier reliability of bipolar transistors

Abstract: A study of bipolar degradation over a range of stress and measurement conditions is presented. It is shown that the excess base current, Delta I/sub B/, varies in a power-law manner with J/sub C/, I/sub R/, and t. The I/sub R/ dependence results from a significant nonlocal effect in electron temperature that occurs at the periphery of the emitter due to the narrow depletion width. A quasistatic model of the degradation, suitable for SPICE circuit simulation, is presented and used to simulate the degradation of a BiCMOS inverter and differential pair circuit. The simulation of an advanced BiCMOS process indicates a degradation in the low-to-high propagation delay of 7% and 300 K and 3% at 110 K after 10 years of operation with C/sub L/=2 pf and V/sub CC/=5.5 V. For emitter-coupled pair circuits, the base current degradation can create a voltage drop across the base resistance, resulting in an additional offset voltage component. With the modeling methodology presented, one can predict the effect of varying the emitter-extrinsic-base junction doping profile on circuit reliability. >

Ultra‐large‐scale integration device scaling and reliability

Abstract: Assuming that the requisite lithography and planarization techniques will be available, this article reviews the goals of metal–oxide semiconductor field effect transistor (MOSFET) scaling and the constraints of low leakage and adequate reliability, highlighting the impact of power‐supply voltage and oxide thickness reductions. Plasma charging damage is discussed. The first identifiable scaling limit is the direct tunneling of gate oxide at 3.5 nm, which may hinder scaling beyond 0.09 μm. From the 0.5‐μm generation onward, MOSFET current will basically cease to increase with scaling. Gate speed will double every four generations rather than two generations of technology as in the past unless technology innovations can pick up the slack.

AC output conductance of SOI MOSFETs and impact on analog applications

Abstract: We report a frequency-dependent output conductance of partially depleted SOI MOSFETs. For high-frequency analog applications, the output conductance is less than half and the dynamic range of V/sub d/ is two times higher than the dc I-V characteristics would indicate. A simple physical model for the phenomenon that involves a phenomenological body charging capacitance and can fit data within 10% is presented.

A resistive-gated IGFET tetrode

Abstract: Studies of the properties of a new insulated-gate field-effect tetrode which consists basically of an IGFET triode having a resistive-gate electrode with connections transverse to the source-drain dimension are described. Experimental tetrodes on silicon with nichrome gates are fabricated to demonstrate applications of the device as a mixer, an amplitude modulator, and an AGC amplifier. Theories are also developed to calculate the static and the high-frequency characteristics of the tetrode, and are found to be in good agreement with the experimental results.

I and i

Abstract: There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality. Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

疟原虫var基因转换速率变化导致抗原变异[英]／Paul H, Robert P, Christodoulou Z, et al//Proc Natl Acad Sci U S A

Abstract: 抗原变异可使得多种致病微生物易于逃避宿主免疫应答。表达在感染红细胞表面的恶性疟原虫红细胞表面蛋白1（PfPMP1）与感染红细胞、内皮细胞、树突状细胞以及胎盘的单个或多个受体作用，在黏附及免疫逃避中起关键的作用。每个单倍体基因组var基因家族编码约60种成员，通过启动转录不同的var基因变异体为抗原变异提供了分子基础。

High-κ gate dielectrics: Current status and materials properties considerations

Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...

Design of Analog CMOS Integrated Circuits

Abstract: The CMOS technology area has quickly grown, calling for a new text--and here it is, covering the analysis and design of CMOS integrated circuits that practicing engineers need to master to succeed. Filled with many examples and chapter-ending problems, the book not only describes the thought process behind each circuit topology, but also considers the rationale behind each modification. The analysis and design techniques focus on CMOS circuits but also apply to other IC technologies. Table of contents 1 Introduction to Analog Design 2 Basic MOS Device Physics 3 Single-Stage Amplifiers 4 Differential Amplifiers 5 Passive and Active Current Mirrors 6 Frequency Response of Amplifiers 7 Noise 8 Feedback 9 Operational Amplifiers 10 Stability and Frequency Compensation 11 Bandgap References 12 Introduction to Switched-Capacitor Circuits 13 Nonlinearity and Mismatch 14 Oscillators 15 Phase-Locked Loops 16 Short-Channel Effects and Device Models 17 CMOS Processing Technology 18 Layout and Packaging

Prospects of Colloidal Nanocrystals for Electronic and Optoelectronic Applications

Abstract: Nanocrystals (NCs) discussed in this Review are tiny crystals of metals, semiconductors, and magnetic material consisting of hundreds to a few thousand atoms each. Their size ranges from 2-3 to about 20 nm. What is special about this size regime that placed NCs among the hottest research topics of the last decades? The quantum mechanical coupling * To whom correspondence should be addressed. E-mail: dvtalapin@uchicago.edu. † The University of Chicago. ‡ Argonne National Lab. Chem. Rev. 2010, 110, 389–458 389